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Primitive device: PNP/NPN (vertical oder lateral) for CMOS-only #267

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hpretl opened this issue Nov 16, 2024 · 2 comments
Open

Primitive device: PNP/NPN (vertical oder lateral) for CMOS-only #267

hpretl opened this issue Nov 16, 2024 · 2 comments

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@hpretl
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hpretl commented Nov 16, 2024

For CMOS-only designs, an NPN or PNP (either lateral or vertical) would be needed for bandgaps and similar uses.

@christoph-weiser
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Is pnpMPA not the device you are looking for?

@hpretl
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hpretl commented Nov 17, 2024

Thanks for the pointer, you are absolutely right! I totally missed it because there is no pcell in KLayout (at least none that I can find) and no mention in the process description, but there is a model and symbol for simulation and a fixed layout in sg13g2_pr.gds.

@KrzysztofHerman @sergeiandreyev Are there plans to provide a pcell, or is there one fixed size of PNP with a fixed layout (which is quite the norm for parasitic PNPs)? In any case, a description in the SG13G2_process_spec.pdf would be great!

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