diff --git a/README.md b/README.md
index 06a4db9..6f01063 100644
--- a/README.md
+++ b/README.md
@@ -331,6 +331,11 @@ An individual operation requested a write to a read-only MSR.
 
 There are no msr_safe-specific error conditions.
 
+# ALLOWLIST CONTRIBUTIONS
+
+The contribs/ folder contains allowlists shared by 
+our external collaborators, organized by site-name.
+
 # msr-save
 
 The msrsave utility provides a mechanism for saving and restoring MSR values
diff --git a/contribs/riken/al_06_8F b/contribs/riken/al_06_8F
new file mode 100644
index 0000000..c4f1ae3
--- /dev/null
+++ b/contribs/riken/al_06_8F
@@ -0,0 +1,561 @@
+## This file contains the model-specific registers available in 06_8F processors
+## based on a close reading of volume 4 of the Intel 64 and IA-32 Architectures
+## Software Development Manual (335592-079US March 2023).
+## Uncommenting allows reading a particular MSR.
+## Modifying the write mask allows writing to those particular bits.
+## Be sure to cat the modified list into /dev/cpu/msr_allowlist.
+## See the README file for more details.
+##
+# ## MSR        # Write Mask       # Comment
+# 0x00000000 0x0000000000000000 # "IA32_P5_MC_ADDR (Table: 2-20)"
+# 0x00000001 0x0000000000000000 # "IA32_P5_MC_TYPE (Table: 2-20)"
+# 0x00000006 0x0000000000000000 # "IA32_MONITOR_FILTER_SIZE (Table: 2-20)"
+# 0x00000010 0x0000000000000000 # "IA32_TIME_STAMP_COUNTER (Table: 2-20)"
+# 0x00000017 0x0000000000000000 # "IA32_PLATFORM_ID (Table: 2-20)"
+# 0x0000001B 0x0000000000000000 # "IA32_APIC_BASE (Table: 2-20)"
+# 0x00000034 0x0000000000000000 # "MSR_SMI_COUNT (Table: 2-20)"
+# 0x0000003A 0x0000000000000000 # "IA32_FEATURE_CONTROL (Table: 2-20)"
+# 0x0000003B 0x0000000000000000 # "IA32_TSC_ADJUST (Table: 2-29)"
+# 0x0000004E 0x0000000000000000 # "IA32_PPIN_CTL (Table: 2-36)"
+# 0x0000004F 0x0000000000000000 # "IA32_PPIN (Table: 2-36)"
+# 0x00000079 0x0000000000000000 # "IA32_BIOS_UPDT_TRIG (Table: 2-20)"
+# 0x0000008B 0x0000000000000000 # "IA32_BIOS_SIGN_ID (Table: 2-20)"
+# 0x000000C1 0x0000000000000000 # "IA32_PMC0 (Table: 2-20)"
+# 0x000000C2 0x0000000000000000 # "IA32_PMC1 (Table: 2-20)"
+# 0x000000C3 0x0000000000000000 # "IA32_PMC2 (Table: 2-20)"
+# 0x000000C4 0x0000000000000000 # "IA32_PMC3 (Table: 2-20)"
+# 0x000000C5 0x0000000000000000 # "IA32_PMC4 (Table: 2-20)"
+# 0x000000C6 0x0000000000000000 # "IA32_PMC5 (Table: 2-20)"
+# 0x000000C7 0x0000000000000000 # "IA32_PMC6 (Table: 2-20)"
+# 0x000000C8 0x0000000000000000 # "IA32_PMC7 (Table: 2-20)"
+# 0x000000CE 0x0000000000000000 # "MSR_PLATFORM_INFO (Table: 2-36)"
+# 0x000000E2 0x0000000000000000 # "MSR_PKG_CST_CONFIG_CONTROL (Table: 2-36)"
+# 0x000000E4 0x0000000000000000 # "MSR_PMG_IO_CAPTURE_BASE (Table: 2-20)"
+# 0x000000E7 0x0000000000000000 # "IA32_MPERF (Table: 2-20)"
+# 0x000000E8 0x0000000000000000 # "IA32_APERF (Table: 2-20)"
+# 0x000000FE 0x0000000000000000 # "IA32_MTRRCAP (Table: 2-20)"
+# 0x0000013C 0x0000000000000000 # "MSR_FEATURE_CONFIG (Table: 2-20)"
+# 0x00000174 0x0000000000000000 # "IA32_SYSENTER_CS (Table: 2-20)"
+# 0x00000175 0x0000000000000000 # "IA32_SYSENTER_ESP (Table: 2-20)"
+# 0x00000176 0x0000000000000000 # "IA32_SYSENTER_EIP (Table: 2-20)"
+# 0x00000179 0x0000000000000000 # "IA32_MCG_CAP (Table: 2-36)"
+# 0x0000017A 0x0000000000000000 # "IA32_MCG_STATUS (Table: 2-20)"
+# 0x0000017D 0x0000000000000000 # "MSR_SMM_MCA_CAP (Table: 2-36)"
+# 0x00000186 0x0000000000000000 # "IA32_PERFEVTSEL0 (Table: 2-29)"
+# 0x00000187 0x0000000000000000 # "IA32_PERFEVTSEL1 (Table: 2-29)"
+# 0x00000188 0x0000000000000000 # "IA32_PERFEVTSEL2 (Table: 2-29)"
+# 0x00000189 0x0000000000000000 # "IA32_PERFEVTSEL3 (Table: 2-29)"
+# 0x0000018A 0x0000000000000000 # "IA32_PERFEVTSEL4 (Table: 2-20)"
+# 0x0000018B 0x0000000000000000 # "IA32_PERFEVTSEL5 (Table: 2-20)"
+# 0x0000018C 0x0000000000000000 # "IA32_PERFEVTSEL6 (Table: 2-20)"
+# 0x0000018D 0x0000000000000000 # "IA32_PERFEVTSEL7 (Table: 2-20)"
+# 0x00000198 0x0000000000000000 # "MSR_PERF_STATUS (Table: 2-20)"
+# 0x00000199 0x0000000000000000 # "IA32_PERF_CTL (Table: 2-20)"
+# 0x0000019A 0x0000000000000000 # "IA32_CLOCK_MODULATION (Table: 2-20)"
+# 0x0000019B 0x0000000000000000 # "IA32_THERM_INTERRUPT (Table: 2-20)"
+# 0x0000019C 0x0000000000000000 # "IA32_THERM_STATUS (Table: 2-36)"
+# 0x000001A0 0x0000000000000000 # "IA32_MISC_ENABLE (Table: 2-20)"
+# 0x000001A2 0x0000000000000000 # "MSR_TEMPERATURE_TARGET (Table: 2-36)"
+# 0x000001A4 0x0000000000000000 # "MSR_MISC_FEATURE_CONTROL (Table: 2-20)"
+# 0x000001A6 0x0000000000000000 # "MSR_OFFCORE_RSP_0 (Table: 2-20)"
+# 0x000001A7 0x0000000000000000 # "MSR_OFFCORE_RSP_1 (Table: 2-20)"
+# 0x000001AA 0x0000000000000000 # "MSR_MISC_PWR_MGMT (Table: 2-20)"
+# 0x000001AC 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT3 (Table: 2-38)"
+# 0x000001AD 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT (Table: 2-36)"
+# 0x000001AE 0x0000000000000000 # "MSR_TURBO_RATIO_LIMIT1 (Table: 2-36)"
+# 0x000001B0 0x0000000000000000 # "IA32_ENERGY_PERF_BIAS (Table: 2-20)"
+# 0x000001B1 0x0000000000000000 # "IA32_PACKAGE_THERM_STATUS (Table: 2-20)"
+# 0x000001B2 0x0000000000000000 # "IA32_PACKAGE_THERM_INTERRUPT (Table: 2-20)"
+# 0x000001C8 0x0000000000000000 # "MSR_LBR_SELECT (Table: 2-29)"
+# 0x000001C9 0x0000000000000000 # "MSR_LASTBRANCH_TOS (Table: 2-20)"
+# 0x000001D9 0x0000000000000000 # "IA32_DEBUGCTL (Table: 2-29)"
+# 0x000001DD 0x0000000000000000 # "MSR_LER_FROM_LIP (Table: 2-20)"
+# 0x000001DE 0x0000000000000000 # "MSR_LER_TO_LIP (Table: 2-20)"
+# 0x000001F2 0x0000000000000000 # "IA32_SMRR_PHYSBASE (Table: 2-20)"
+# 0x000001F3 0x0000000000000000 # "IA32_SMRR_PHYSMASK (Table: 2-20)"
+# 0x000001FC 0x0000000000000000 # "MSR_POWER_CTL (Table: 2-20)"
+# 0x00000200 0x0000000000000000 # "IA32_MTRR_PHYSBASE0 (Table: 2-20)"
+# 0x00000201 0x0000000000000000 # "IA32_MTRR_PHYSMASK0 (Table: 2-20)"
+# 0x00000202 0x0000000000000000 # "IA32_MTRR_PHYSBASE1 (Table: 2-20)"
+# 0x00000203 0x0000000000000000 # "IA32_MTRR_PHYSMASK1 (Table: 2-20)"
+# 0x00000204 0x0000000000000000 # "IA32_MTRR_PHYSBASE2 (Table: 2-20)"
+# 0x00000205 0x0000000000000000 # "IA32_MTRR_PHYSMASK2 (Table: 2-20)"
+# 0x00000206 0x0000000000000000 # "IA32_MTRR_PHYSBASE3 (Table: 2-20)"
+# 0x00000207 0x0000000000000000 # "IA32_MTRR_PHYSMASK3 (Table: 2-20)"
+# 0x00000208 0x0000000000000000 # "IA32_MTRR_PHYSBASE4 (Table: 2-20)"
+# 0x00000209 0x0000000000000000 # "IA32_MTRR_PHYSMASK4 (Table: 2-20)"
+# 0x0000020A 0x0000000000000000 # "IA32_MTRR_PHYSBASE5 (Table: 2-20)"
+# 0x0000020B 0x0000000000000000 # "IA32_MTRR_PHYSMASK5 (Table: 2-20)"
+# 0x0000020C 0x0000000000000000 # "IA32_MTRR_PHYSBASE6 (Table: 2-20)"
+# 0x0000020D 0x0000000000000000 # "IA32_MTRR_PHYSMASK6 (Table: 2-20)"
+# 0x0000020E 0x0000000000000000 # "IA32_MTRR_PHYSBASE7 (Table: 2-20)"
+# 0x0000020F 0x0000000000000000 # "IA32_MTRR_PHYSMASK7 (Table: 2-20)"
+# 0x00000210 0x0000000000000000 # "IA32_MTRR_PHYSBASE8 (Table: 2-20)"
+# 0x00000211 0x0000000000000000 # "IA32_MTRR_PHYSMASK8 (Table: 2-20)"
+# 0x00000212 0x0000000000000000 # "IA32_MTRR_PHYSBASE9 (Table: 2-20)"
+# 0x00000213 0x0000000000000000 # "IA32_MTRR_PHYSMASK9 (Table: 2-20)"
+# 0x00000250 0x0000000000000000 # "IA32_MTRR_FIX64K_00000 (Table: 2-20)"
+# 0x00000258 0x0000000000000000 # "IA32_MTRR_FIX16K_80000 (Table: 2-20)"
+# 0x00000259 0x0000000000000000 # "IA32_MTRR_FIX16K_A0000 (Table: 2-20)"
+# 0x00000268 0x0000000000000000 # "IA32_MTRR_FIX4K_C0000 (Table: 2-20)"
+# 0x00000269 0x0000000000000000 # "IA32_MTRR_FIX4K_C8000 (Table: 2-20)"
+# 0x0000026A 0x0000000000000000 # "IA32_MTRR_FIX4K_D0000 (Table: 2-20)"
+# 0x0000026B 0x0000000000000000 # "IA32_MTRR_FIX4K_D8000 (Table: 2-20)"
+# 0x0000026C 0x0000000000000000 # "IA32_MTRR_FIX4K_E0000 (Table: 2-20)"
+# 0x0000026D 0x0000000000000000 # "IA32_MTRR_FIX4K_E8000 (Table: 2-20)"
+# 0x0000026E 0x0000000000000000 # "IA32_MTRR_FIX4K_F0000 (Table: 2-20)"
+# 0x0000026F 0x0000000000000000 # "IA32_MTRR_FIX4K_F8000 (Table: 2-20)"
+# 0x00000277 0x0000000000000000 # "IA32_PAT (Table: 2-20)"
+# 0x00000280 0x0000000000000000 # "IA32_MC0_CTL2 (Table: 2-20)"
+# 0x00000281 0x0000000000000000 # "IA32_MC1_CTL2 (Table: 2-20)"
+# 0x00000282 0x0000000000000000 # "IA32_MC2_CTL2 (Table: 2-20)"
+# 0x00000283 0x0000000000000000 # "IA32_MC3_CTL2 (Table: 2-20)"
+# 0x00000284 0x0000000000000000 # "IA32_MC4_CTL2 (Table: 2-20)"
+# 0x00000285 0x0000000000000000 # "IA32_MC5_CTL2 (Table: 2-38)"
+# 0x00000286 0x0000000000000000 # "IA32_MC6_CTL2 (Table: 2-38)"
+# 0x00000287 0x0000000000000000 # "IA32_MC7_CTL2 (Table: 2-38)"
+# 0x00000288 0x0000000000000000 # "IA32_MC8_CTL2 (Table: 2-38)"
+# 0x00000289 0x0000000000000000 # "IA32_MC9_CTL2 (Table: 2-38)"
+# 0x0000028A 0x0000000000000000 # "IA32_MC10_CTL2 (Table: 2-38)"
+# 0x0000028B 0x0000000000000000 # "IA32_MC11_CTL2 (Table: 2-38)"
+# 0x0000028C 0x0000000000000000 # "IA32_MC12_CTL2 (Table: 2-38)"
+# 0x0000028D 0x0000000000000000 # "IA32_MC13_CTL2 (Table: 2-38)"
+# 0x0000028E 0x0000000000000000 # "IA32_MC14_CTL2 (Table: 2-38)"
+# 0x0000028F 0x0000000000000000 # "IA32_MC15_CTL2 (Table: 2-38)"
+# 0x00000290 0x0000000000000000 # "IA32_MC16_CTL2 (Table: 2-38)"
+# 0x00000291 0x0000000000000000 # "IA32_MC17_CTL2 (Table: 2-38)"
+# 0x00000292 0x0000000000000000 # "IA32_MC18_CTL2 (Table: 2-38)"
+# 0x00000293 0x0000000000000000 # "IA32_MC19_CTL2 (Table: 2-38)"
+# 0x00000294 0x0000000000000000 # "IA32_MC20_CTL2 (Table: 2-38)"
+# 0x00000295 0x0000000000000000 # "IA32_MC21_CTL2 (Table: 2-38)"
+# 0x000002FF 0x0000000000000000 # "IA32_MTRR_DEF_TYPE (Table: 2-20)"
+# 0x00000309 0x0000000000000000 # "IA32_FIXED_CTR0 (Table: 2-20)"
+# 0x0000030A 0x0000000000000000 # "IA32_FIXED_CTR1 (Table: 2-20)"
+# 0x0000030B 0x0000000000000000 # "IA32_FIXED_CTR2 (Table: 2-20)"
+# 0x00000345 0x0000000000000000 # "IA32_PERF_CAPABILITIES (Table: 2-20)"
+# 0x0000038D 0x0000000000000000 # "IA32_FIXED_CTR_CTRL (Table: 2-20)"
+# 0x0000038E 0x0000000000000000 # "IA32_PERF_GLOBAL_STATUS (Table: 2-34)"
+# 0x0000038F 0x0000000000000000 # "IA32_PERF_GLOBAL_CTRL (Table: 2-20)"
+# 0x00000390 0x0000000000000000 # "IA32_PERF_GLOBAL_OVF_CTRL (Table: 2-34)"
+# 0x000003F1 0x0000000000000000 # "IA32_PEBS_ENABLE (Table: 2-20)"
+# 0x000003F6 0x0000000000000000 # "MSR_PEBS_LD_LAT (Table: 2-20)"
+# 0x000003F8 0x0000000000000000 # "MSR_PKG_C3_RESIDENCY (Table: 2-20)"
+# 0x000003F9 0x0000000000000000 # "MSR_PKG_C6_RESIDENCY (Table: 2-20)"
+# 0x000003FA 0x0000000000000000 # "MSR_PKG_C7_RESIDENCY (Table: 2-20)"
+# 0x000003FC 0x0000000000000000 # "MSR_CORE_C3_RESIDENCY (Table: 2-20)"
+# 0x000003FD 0x0000000000000000 # "MSR_CORE_C6_RESIDENCY (Table: 2-20)"
+# 0x000003FE 0x0000000000000000 # "MSR_CORE_C7_RESIDENCY (Table: 2-20)"
+# 0x00000400 0x0000000000000000 # "IA32_MC0_CTL (Table: 2-20)"
+# 0x00000401 0x0000000000000000 # "IA32_MC0_STATUS (Table: 2-20)"
+# 0x00000402 0x0000000000000000 # "IA32_MC0_ADDR (Table: 2-20)"
+# 0x00000403 0x0000000000000000 # "IA32_MC0_MISC (Table: 2-20)"
+# 0x00000404 0x0000000000000000 # "IA32_MC1_CTL (Table: 2-20)"
+# 0x00000405 0x0000000000000000 # "IA32_MC1_STATUS (Table: 2-20)"
+# 0x00000406 0x0000000000000000 # "IA32_MC1_ADDR (Table: 2-20)"
+# 0x00000407 0x0000000000000000 # "IA32_MC1_MISC (Table: 2-20)"
+# 0x00000408 0x0000000000000000 # "IA32_MC2_CTL (Table: 2-20)"
+# 0x00000409 0x0000000000000000 # "IA32_MC2_STATUS (Table: 2-20)"
+# 0x0000040A 0x0000000000000000 # "IA32_MC2_ADDR (Table: 2-20)"
+# 0x0000040B 0x0000000000000000 # "IA32_MC2_MISC (Table: 2-20)"
+# 0x0000040C 0x0000000000000000 # "IA32_MC3_CTL (Table: 2-20)"
+# 0x0000040D 0x0000000000000000 # "IA32_MC3_STATUS (Table: 2-20)"
+# 0x0000040E 0x0000000000000000 # "IA32_MC3_ADDR (Table: 2-20)"
+# 0x0000040F 0x0000000000000000 # "IA32_MC3_MISC (Table: 2-20)"
+# 0x00000410 0x0000000000000000 # "IA32_MC4_CTL (Table: 2-20)"
+# 0x00000411 0x0000000000000000 # "IA32_MC4_STATUS (Table: 2-20)"
+# 0x00000414 0x0000000000000000 # "IA32_MC5_CTL (Table: 2-38)"
+# 0x00000415 0x0000000000000000 # "IA32_MC5_STATUS (Table: 2-38)"
+# 0x00000416 0x0000000000000000 # "IA32_MC5_ADDR (Table: 2-38)"
+# 0x00000417 0x0000000000000000 # "IA32_MC5_MISC (Table: 2-38)"
+# 0x00000418 0x0000000000000000 # "IA32_MC6_CTL (Table: 2-38)"
+# 0x00000419 0x0000000000000000 # "IA32_MC6_STATUS (Table: 2-38)"
+# 0x0000041A 0x0000000000000000 # "IA32_MC6_ADDR (Table: 2-38)"
+# 0x0000041B 0x0000000000000000 # "IA32_MC6_MISC (Table: 2-38)"
+# 0x0000041C 0x0000000000000000 # "IA32_MC7_CTL (Table: 2-38)"
+# 0x0000041D 0x0000000000000000 # "IA32_MC7_STATUS (Table: 2-38)"
+# 0x0000041E 0x0000000000000000 # "IA32_MC7_ADDR (Table: 2-38)"
+# 0x0000041F 0x0000000000000000 # "IA32_MC7_MISC (Table: 2-38)"
+# 0x00000420 0x0000000000000000 # "IA32_MC8_CTL (Table: 2-38)"
+# 0x00000421 0x0000000000000000 # "IA32_MC8_STATUS (Table: 2-38)"
+# 0x00000422 0x0000000000000000 # "IA32_MC8_ADDR (Table: 2-38)"
+# 0x00000423 0x0000000000000000 # "IA32_MC8_MISC (Table: 2-38)"
+# 0x00000424 0x0000000000000000 # "IA32_MC9_CTL (Table: 2-38)"
+# 0x00000425 0x0000000000000000 # "IA32_MC9_STATUS (Table: 2-38)"
+# 0x00000426 0x0000000000000000 # "IA32_MC9_ADDR (Table: 2-38)"
+# 0x00000427 0x0000000000000000 # "IA32_MC9_MISC (Table: 2-38)"
+# 0x00000428 0x0000000000000000 # "IA32_MC10_CTL (Table: 2-38)"
+# 0x00000429 0x0000000000000000 # "IA32_MC10_STATUS (Table: 2-38)"
+# 0x0000042A 0x0000000000000000 # "IA32_MC10_ADDR (Table: 2-38)"
+# 0x0000042B 0x0000000000000000 # "IA32_MC10_MISC (Table: 2-38)"
+# 0x0000042C 0x0000000000000000 # "IA32_MC11_CTL (Table: 2-38)"
+# 0x0000042D 0x0000000000000000 # "IA32_MC11_STATUS (Table: 2-38)"
+# 0x0000042E 0x0000000000000000 # "IA32_MC11_ADDR (Table: 2-38)"
+# 0x0000042F 0x0000000000000000 # "IA32_MC11_MISC (Table: 2-38)"
+# 0x00000430 0x0000000000000000 # "IA32_MC12_CTL (Table: 2-38)"
+# 0x00000431 0x0000000000000000 # "IA32_MC12_STATUS (Table: 2-38)"
+# 0x00000432 0x0000000000000000 # "IA32_MC12_ADDR (Table: 2-38)"
+# 0x00000433 0x0000000000000000 # "IA32_MC12_MISC (Table: 2-38)"
+# 0x00000434 0x0000000000000000 # "IA32_MC13_CTL (Table: 2-38)"
+# 0x00000435 0x0000000000000000 # "IA32_MC13_STATUS (Table: 2-38)"
+# 0x00000436 0x0000000000000000 # "IA32_MC13_ADDR (Table: 2-38)"
+# 0x00000437 0x0000000000000000 # "IA32_MC13_MISC (Table: 2-38)"
+# 0x00000438 0x0000000000000000 # "IA32_MC14_CTL (Table: 2-38)"
+# 0x00000439 0x0000000000000000 # "IA32_MC14_STATUS (Table: 2-38)"
+# 0x0000043A 0x0000000000000000 # "IA32_MC14_ADDR (Table: 2-38)"
+# 0x0000043B 0x0000000000000000 # "IA32_MC14_MISC (Table: 2-38)"
+# 0x0000043C 0x0000000000000000 # "IA32_MC15_CTL (Table: 2-38)"
+# 0x0000043D 0x0000000000000000 # "IA32_MC15_STATUS (Table: 2-38)"
+# 0x0000043E 0x0000000000000000 # "IA32_MC15_ADDR (Table: 2-38)"
+# 0x0000043F 0x0000000000000000 # "IA32_MC15_MISC (Table: 2-38)"
+# 0x00000440 0x0000000000000000 # "IA32_MC16_CTL (Table: 2-38)"
+# 0x00000441 0x0000000000000000 # "IA32_MC16_STATUS (Table: 2-38)"
+# 0x00000442 0x0000000000000000 # "IA32_MC16_ADDR (Table: 2-38)"
+# 0x00000443 0x0000000000000000 # "IA32_MC16_MISC (Table: 2-38)"
+# 0x00000444 0x0000000000000000 # "IA32_MC17_CTL (Table: 2-38)"
+# 0x00000445 0x0000000000000000 # "IA32_MC17_STATUS (Table: 2-38)"
+# 0x00000446 0x0000000000000000 # "IA32_MC17_ADDR (Table: 2-38)"
+# 0x00000447 0x0000000000000000 # "IA32_MC17_MISC (Table: 2-38)"
+# 0x00000448 0x0000000000000000 # "IA32_MC18_CTL (Table: 2-38)"
+# 0x00000449 0x0000000000000000 # "IA32_MC18_STATUS (Table: 2-38)"
+# 0x0000044A 0x0000000000000000 # "IA32_MC18_ADDR (Table: 2-38)"
+# 0x0000044B 0x0000000000000000 # "IA32_MC18_MISC (Table: 2-38)"
+# 0x0000044C 0x0000000000000000 # "IA32_MC19_CTL (Table: 2-38)"
+# 0x0000044D 0x0000000000000000 # "IA32_MC19_STATUS (Table: 2-38)"
+# 0x0000044E 0x0000000000000000 # "IA32_MC19_ADDR (Table: 2-38)"
+# 0x0000044F 0x0000000000000000 # "IA32_MC19_MISC (Table: 2-38)"
+# 0x00000450 0x0000000000000000 # "IA32_MC20_CTL (Table: 2-38)"
+# 0x00000451 0x0000000000000000 # "IA32_MC20_STATUS (Table: 2-38)"
+# 0x00000452 0x0000000000000000 # "IA32_MC20_ADDR (Table: 2-38)"
+# 0x00000453 0x0000000000000000 # "IA32_MC20_MISC (Table: 2-38)"
+# 0x00000454 0x0000000000000000 # "IA32_MC21_CTL (Table: 2-38)"
+# 0x00000455 0x0000000000000000 # "IA32_MC21_STATUS (Table: 2-38)"
+# 0x00000456 0x0000000000000000 # "IA32_MC21_ADDR (Table: 2-38)"
+# 0x00000457 0x0000000000000000 # "IA32_MC21_MISC (Table: 2-38)"
+# 0x00000480 0x0000000000000000 # "IA32_VMX_BASIC (Table: 2-20)"
+# 0x00000481 0x0000000000000000 # "IA32_VMX_PINBASED_CTLS (Table: 2-20)"
+# 0x00000482 0x0000000000000000 # "IA32_VMX_PROCBASED_CTLS (Table: 2-20)"
+# 0x00000483 0x0000000000000000 # "IA32_VMX_EXIT_CTLS (Table: 2-20)"
+# 0x00000484 0x0000000000000000 # "IA32_VMX_ENTRY_CTLS (Table: 2-20)"
+# 0x00000485 0x0000000000000000 # "IA32_VMX_MISC (Table: 2-20)"
+# 0x00000486 0x0000000000000000 # "IA32_VMX_CR0_FIXED0 (Table: 2-20)"
+# 0x00000487 0x0000000000000000 # "IA32_VMX_CR0_FIXED1 (Table: 2-20)"
+# 0x00000488 0x0000000000000000 # "IA32_VMX_CR4_FIXED0 (Table: 2-20)"
+# 0x00000489 0x0000000000000000 # "IA32_VMX_CR4_FIXED1 (Table: 2-20)"
+# 0x0000048A 0x0000000000000000 # "IA32_VMX_VMCS_ENUM (Table: 2-20)"
+# 0x0000048B 0x0000000000000000 # "IA32_VMX_PROCBASED_CTLS2 (Table: 2-20)"
+# 0x0000048C 0x0000000000000000 # "IA32_VMX_EPT_VPID_ENUM (Table: 2-20)"
+# 0x0000048D 0x0000000000000000 # "IA32_VMX_TRUE_PINBASED_CTLS (Table: 2-20)"
+# 0x0000048E 0x0000000000000000 # "IA32_VMX_TRUE_PROCBASED_CTLS (Table: 2-20)"
+# 0x0000048F 0x0000000000000000 # "IA32_VMX_TRUE_EXIT_CTLS (Table: 2-20)"
+# 0x00000490 0x0000000000000000 # "IA32_VMX_TRUE_ENTRY_CTLS (Table: 2-20)"
+# 0x00000491 0x0000000000000000 # "IA32_VMX_VMFUNC (Table: 2-29)"
+# 0x000004C1 0x0000000000000000 # "IA32_A_PMC0 (Table: 2-20)"
+# 0x000004C2 0x0000000000000000 # "IA32_A_PMC1 (Table: 2-20)"
+# 0x000004C3 0x0000000000000000 # "IA32_A_PMC2 (Table: 2-20)"
+# 0x000004C4 0x0000000000000000 # "IA32_A_PMC3 (Table: 2-20)"
+# 0x000004C5 0x0000000000000000 # "IA32_A_PMC4 (Table: 2-20)"
+# 0x000004C6 0x0000000000000000 # "IA32_A_PMC5 (Table: 2-20)"
+# 0x000004C7 0x0000000000000000 # "IA32_A_PMC6 (Table: 2-20)"
+# 0x000004C8 0x0000000000000000 # "IA32_A_PMC7 (Table: 2-20)"
+# 0x00000560 0x0000000000000000 # "IA32_RTIT_OUTPUT_BASE (Table: 2-34)"
+# 0x00000561 0x0000000000000000 # "IA32_RTIT_OUTPUT_MASK_PTRS (Table: 2-34)"
+# 0x00000570 0x0000000000000000 # "IA32_RTIT_CTL (Table: 2-34)"
+# 0x00000571 0x0000000000000000 # "IA32_RTIT_STATUS (Table: 2-34)"
+# 0x00000572 0x0000000000000000 # "IA32_RTIT_CR3_MATCH (Table: 2-34)"
+# 0x00000600 0x0000000000000000 # "IA32_DS_AREA (Table: 2-20)"
+# 0x00000606 0x0000000000000000 # "MSR_RAPL_POWER_UNIT (Table: 2-36)"
+# 0x0000060A 0x0000000000000000 # "MSR_PKGC3_IRTL (Table: 2-20)"
+# 0x0000060B 0x0000000000000000 # "MSR_PKGC_IRTL1 (Table: 2-29)"
+# 0x0000060C 0x0000000000000000 # "MSR_PKGC_IRTL2 (Table: 2-29)"
+# 0x0000060D 0x0000000000000000 # "MSR_PKG_C2_RESIDENCY (Table: 2-20)"
+# 0x00000610 0x0000000000000000 # "MSR_PKG_POWER_LIMIT (Table: 2-20)"
+# 0x00000611 0x0000000000000000 # "MSR_PKG_ENERGY_STATUS (Table: 2-20)"
+# 0x00000613 0x0000000000000000 # "MSR_PKG_PERF_STATUS (Table: 2-29)"
+# 0x00000614 0x0000000000000000 # "MSR_PKG_POWER_INFO (Table: 2-20)"
+# 0x00000618 0x0000000000000000 # "MSR_DRAM_POWER_LIMIT (Table: 2-36)"
+# 0x00000619 0x0000000000000000 # "MSR_DRAM_ENERGY_STATUS (Table: 2-36)"
+# 0x0000061B 0x0000000000000000 # "MSR_DRAM_PERF_STATUS (Table: 2-36)"
+# 0x0000061C 0x0000000000000000 # "MSR_DRAM_POWER_INFO (Table: 2-36)"
+# 0x00000620 0x0000000000000000 # "MSR_UNCORE_RATIO_LIMIT (Table: 2-36)"
+# 0x00000638 0x0000000000000000 # "MSR_PP0_POWER_LIMIT (Table: 2-20)"
+# 0x00000639 0x0000000000000000 # "MSR_PP0_ENERGY_STATUS (Table: 2-36)"
+# 0x0000063A 0x0000000000000000 # "MSR_PP0_POLICY (Table: 2-21)"
+# 0x00000640 0x0000000000000000 # "MSR_PP1_POWER_LIMIT (Table: 2-21)"
+# 0x00000641 0x0000000000000000 # "MSR_PP1_ENERGY_STATUS (Table: 2-21)"
+# 0x00000642 0x0000000000000000 # "MSR_PP1_POLICY (Table: 2-21)"
+# 0x00000648 0x0000000000000000 # "MSR_CONFIG_TDP_NOMINAL (Table: 2-29)"
+# 0x00000649 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL1 (Table: 2-29)"
+# 0x0000064A 0x0000000000000000 # "MSR_CONFIG_TDP_LEVEL2 (Table: 2-29)"
+# 0x0000064B 0x0000000000000000 # "MSR_CONFIG_TDP_CONTROL (Table: 2-29)"
+# 0x0000064C 0x0000000000000000 # "MSR_TURBO_ACTIVATION_RATIO (Table: 2-29)"
+# 0x00000680 0x0000000000000000 # "MSR_LASTBRANCH_0_FROM_IP (Table: 2-20)"
+# 0x00000681 0x0000000000000000 # "MSR_LASTBRANCH_1_FROM_IP (Table: 2-20)"
+# 0x00000682 0x0000000000000000 # "MSR_LASTBRANCH_2_FROM_IP (Table: 2-20)"
+# 0x00000683 0x0000000000000000 # "MSR_LASTBRANCH_3_FROM_IP (Table: 2-20)"
+# 0x00000684 0x0000000000000000 # "MSR_LASTBRANCH_4_FROM_IP (Table: 2-20)"
+# 0x00000685 0x0000000000000000 # "MSR_LASTBRANCH_5_FROM_IP (Table: 2-20)"
+# 0x00000686 0x0000000000000000 # "MSR_LASTBRANCH_6_FROM_IP (Table: 2-20)"
+# 0x00000687 0x0000000000000000 # "MSR_LASTBRANCH_7_FROM_IP (Table: 2-20)"
+# 0x00000688 0x0000000000000000 # "MSR_LASTBRANCH_8_FROM_IP (Table: 2-20)"
+# 0x00000689 0x0000000000000000 # "MSR_LASTBRANCH_9_FROM_IP (Table: 2-20)"
+# 0x0000068A 0x0000000000000000 # "MSR_LASTBRANCH_10_FROM_IP (Table: 2-20)"
+# 0x0000068B 0x0000000000000000 # "MSR_LASTBRANCH_11_FROM_IP (Table: 2-20)"
+# 0x0000068C 0x0000000000000000 # "MSR_LASTBRANCH_12_FROM_IP (Table: 2-20)"
+# 0x0000068D 0x0000000000000000 # "MSR_LASTBRANCH_13_FROM_IP (Table: 2-20)"
+# 0x0000068E 0x0000000000000000 # "MSR_LASTBRANCH_14_FROM_IP (Table: 2-20)"
+# 0x0000068F 0x0000000000000000 # "MSR_LASTBRANCH_15_FROM_IP (Table: 2-20)"
+# 0x00000690 0x0000000000000000 # "MSR_CORE_PERF_LIMIT_REASONS (Table: 2-36)"
+# 0x000006C0 0x0000000000000000 # "MSR_LASTBRANCH_0_TO_IP (Table: 2-20)"
+# 0x000006C1 0x0000000000000000 # "MSR_LASTBRANCH_1_TO_IP (Table: 2-20)"
+# 0x000006C2 0x0000000000000000 # "MSR_LASTBRANCH_2_TO_IP (Table: 2-20)"
+# 0x000006C3 0x0000000000000000 # "MSR_LASTBRANCH_3_TO_IP (Table: 2-20)"
+# 0x000006C4 0x0000000000000000 # "MSR_LASTBRANCH_4_TO_IP (Table: 2-20)"
+# 0x000006C5 0x0000000000000000 # "MSR_LASTBRANCH_5_TO_IP (Table: 2-20)"
+# 0x000006C6 0x0000000000000000 # "MSR_LASTBRANCH_6_TO_IP (Table: 2-20)"
+# 0x000006C7 0x0000000000000000 # "MSR_LASTBRANCH_7_TO_IP (Table: 2-20)"
+# 0x000006C8 0x0000000000000000 # "MSR_LASTBRANCH_8_TO_IP (Table: 2-20)"
+# 0x000006C9 0x0000000000000000 # "MSR_LASTBRANCH_9_TO_IP (Table: 2-20)"
+# 0x000006CA 0x0000000000000000 # "MSR_LASTBRANCH_10_TO_IP (Table: 2-20)"
+# 0x000006CB 0x0000000000000000 # "MSR_LASTBRANCH_11_TO_IP (Table: 2-20)"
+# 0x000006CC 0x0000000000000000 # "MSR_LASTBRANCH_12_TO_IP (Table: 2-20)"
+# 0x000006CD 0x0000000000000000 # "MSR_LASTBRANCH_13_TO_IP (Table: 2-20)"
+# 0x000006CE 0x0000000000000000 # "MSR_LASTBRANCH_14_TO_IP (Table: 2-20)"
+# 0x000006CF 0x0000000000000000 # "MSR_LASTBRANCH_15_TO_IP (Table: 2-20)"
+# 0x000006E0 0x0000000000000000 # "IA32_TSC_DEADLINE (Table: 2-20)"
+# 0x00000770 0x0000000000000000 # "IA32_PM_ENABLE (Table: 2-36)"
+# 0x00000771 0x0000000000000000 # "IA32_HWP_CAPABILITIES (Table: 2-36)"
+# 0x00000774 0x0000000000000000 # "IA32_HWP_REQUEST (Table: 2-36)"
+# 0x00000777 0x0000000000000000 # "IA32_HWP_STATUS (Table: 2-36)"
+# 0x00000802 0x0000000000000000 # "IA32_X2APIC_APICID (Table: 2-20)"
+# 0x00000803 0x0000000000000000 # "IA32_X2APIC_VERSION (Table: 2-20)"
+# 0x00000808 0x0000000000000000 # "IA32_X2APIC_TPR (Table: 2-20)"
+# 0x0000080A 0x0000000000000000 # "IA32_X2APIC_PPR (Table: 2-20)"
+# 0x0000080B 0x0000000000000000 # "IA32_X2APIC_EOI (Table: 2-20)"
+# 0x0000080D 0x0000000000000000 # "IA32_X2APIC_LDR (Table: 2-20)"
+# 0x0000080F 0x0000000000000000 # "IA32_X2APIC_SIVR (Table: 2-20)"
+# 0x00000810 0x0000000000000000 # "IA32_X2APIC_ISR0 (Table: 2-20)"
+# 0x00000811 0x0000000000000000 # "IA32_X2APIC_ISR1 (Table: 2-20)"
+# 0x00000812 0x0000000000000000 # "IA32_X2APIC_ISR2 (Table: 2-20)"
+# 0x00000813 0x0000000000000000 # "IA32_X2APIC_ISR3 (Table: 2-20)"
+# 0x00000814 0x0000000000000000 # "IA32_X2APIC_ISR4 (Table: 2-20)"
+# 0x00000815 0x0000000000000000 # "IA32_X2APIC_ISR5 (Table: 2-20)"
+# 0x00000816 0x0000000000000000 # "IA32_X2APIC_ISR6 (Table: 2-20)"
+# 0x00000817 0x0000000000000000 # "IA32_X2APIC_ISR7 (Table: 2-20)"
+# 0x00000818 0x0000000000000000 # "IA32_X2APIC_TMR0 (Table: 2-20)"
+# 0x00000819 0x0000000000000000 # "IA32_X2APIC_TMR1 (Table: 2-20)"
+# 0x0000081A 0x0000000000000000 # "IA32_X2APIC_TMR2 (Table: 2-20)"
+# 0x0000081B 0x0000000000000000 # "IA32_X2APIC_TMR3 (Table: 2-20)"
+# 0x0000081C 0x0000000000000000 # "IA32_X2APIC_TMR4 (Table: 2-20)"
+# 0x0000081D 0x0000000000000000 # "IA32_X2APIC_TMR5 (Table: 2-20)"
+# 0x0000081E 0x0000000000000000 # "IA32_X2APIC_TMR6 (Table: 2-20)"
+# 0x0000081F 0x0000000000000000 # "IA32_X2APIC_TMR7 (Table: 2-20)"
+# 0x00000820 0x0000000000000000 # "IA32_X2APIC_IRR0 (Table: 2-20)"
+# 0x00000821 0x0000000000000000 # "IA32_X2APIC_IRR1 (Table: 2-20)"
+# 0x00000822 0x0000000000000000 # "IA32_X2APIC_IRR2 (Table: 2-20)"
+# 0x00000823 0x0000000000000000 # "IA32_X2APIC_IRR3 (Table: 2-20)"
+# 0x00000824 0x0000000000000000 # "IA32_X2APIC_IRR4 (Table: 2-20)"
+# 0x00000825 0x0000000000000000 # "IA32_X2APIC_IRR5 (Table: 2-20)"
+# 0x00000826 0x0000000000000000 # "IA32_X2APIC_IRR6 (Table: 2-20)"
+# 0x00000827 0x0000000000000000 # "IA32_X2APIC_IRR7 (Table: 2-20)"
+# 0x00000828 0x0000000000000000 # "IA32_X2APIC_ERS (Table: 2-20)"
+# 0x0000082F 0x0000000000000000 # "IA32_X2APIC_LVT_CMCI (Table: 2-20)"
+# 0x00000830 0x0000000000000000 # "IA32_X2APIC_ICR (Table: 2-20)"
+# 0x00000832 0x0000000000000000 # "IA32_X2APIC_LVT_TIMER (Table: 2-20)"
+# 0x00000833 0x0000000000000000 # "IA32_X2APIC_LVT_THERMAL (Table: 2-20)"
+# 0x00000834 0x0000000000000000 # "IA32_X2APIC_LVT_PMI (Table: 2-20)"
+# 0x00000835 0x0000000000000000 # "IA32_X2APIC_LVT_LINT0 (Table: 2-20)"
+# 0x00000836 0x0000000000000000 # "IA32_X2APIC_LVT_LINT1 (Table: 2-20)"
+# 0x00000837 0x0000000000000000 # "IA32_X2APIC_LVT_ERROR (Table: 2-20)"
+# 0x00000838 0x0000000000000000 # "IA32_X2APIC_INIT_COUNT (Table: 2-20)"
+# 0x00000839 0x0000000000000000 # "IA32_X2APIC_CUR_COUNT (Table: 2-20)"
+# 0x0000083E 0x0000000000000000 # "IA32_X2APIC_DIV_CONF (Table: 2-20)"
+# 0x0000083F 0x0000000000000000 # "IA32_X2APIC_SELF_IPI (Table: 2-20)"
+# 0x00000C80 0x0000000000000000 # "IA32_DEBUG_INTERFACE (Table: 2-29)"
+# 0x00000C81 0x0000000000000000 # "IA32_L3_QOS_CFG (Table: 2-38)"
+# 0x00000C8D 0x0000000000000000 # "IA32_QM_EVTSEL (Table: 2-36)"
+# 0x00000C8F 0x0000000000000000 # "IA32_PQR_ASSOC (Table: 2-36)"
+# 0x00000C90 0x0000000000000000 # "IA32_L3_QOS_MASK_0 (Table: 2-36)"
+# 0x00000C91 0x0000000000000000 # "IA32_L3_QOS_MASK_1 (Table: 2-36)"
+# 0x00000C92 0x0000000000000000 # "IA32_L3_QOS_MASK_2 (Table: 2-36)"
+# 0x00000C93 0x0000000000000000 # "IA32_L3_QOS_MASK_3 (Table: 2-36)"
+# 0x00000C94 0x0000000000000000 # "IA32_L3_QOS_MASK_4 (Table: 2-36)"
+# 0x00000C95 0x0000000000000000 # "IA32_L3_QOS_MASK_5 (Table: 2-36)"
+# 0x00000C96 0x0000000000000000 # "IA32_L3_QOS_MASK_6 (Table: 2-36)"
+# 0x00000C97 0x0000000000000000 # "IA32_L3_QOS_MASK_7 (Table: 2-36)"
+# 0x00000C98 0x0000000000000000 # "IA32_L3_QOS_MASK_8 (Table: 2-36)"
+# 0x00000C99 0x0000000000000000 # "IA32_L3_QOS_MASK_9 (Table: 2-36)"
+# 0x00000C9A 0x0000000000000000 # "IA32_L3_QOS_MASK_10 (Table: 2-36)"
+# 0x00000C9B 0x0000000000000000 # "IA32_L3_QOS_MASK_11 (Table: 2-36)"
+# 0x00000C9C 0x0000000000000000 # "IA32_L3_QOS_MASK_12 (Table: 2-36)"
+# 0x00000C9D 0x0000000000000000 # "IA32_L3_QOS_MASK_13 (Table: 2-36)"
+# 0x00000C9E 0x0000000000000000 # "IA32_L3_QOS_MASK_14 (Table: 2-36)"
+# 0x00000C9F 0x0000000000000000 # "IA32_L3_QOS_MASK_15 (Table: 2-36)"
+# 0xC0000080 0x0000000000000000 # "IA32_EFER (Table: 2-20)"
+# 0xC0000081 0x0000000000000000 # "IA32_STAR (Table: 2-20)"
+# 0xC0000082 0x0000000000000000 # "IA32_LSTAR (Table: 2-20)"
+# 0xC0000084 0x0000000000000000 # "IA32_FMASK (Table: 2-20)"
+# 0xC0000100 0x0000000000000000 # "IA32_FS_BASE (Table: 2-20)"
+# 0xC0000101 0x0000000000000000 # "IA32_GS_BASE (Table: 2-20)"
+# 0xC0000102 0x0000000000000000 # "IA32_KERNEL_GS_BASE (Table: 2-20)"
+# 0xC0000103 0x0000000000000000 # "IA32_TSC_AUX (Table: 2-20)"
+# 0x00000033 0x0000000000000000 # "MSR_MEMORY_CTRL (Table: 2-52)"
+# 0x000000A7 0x0000000000000000 # "MSR_BIOS_DEBUG (Table: 2-52)"
+# 0x000000BC 0x0000000000000000 # "IA32_MISC_PACKAGE_CTLS (Table: 2-52)"
+# 0x000000CF 0x0000000000000000 # "IA32_CORE_CAPABILITIES (Table: 2-52)"
+# 0x000000E1 0x0000000000000000 # "IA32_UMWAIT_CONTROL (Table: 2-52)"
+# 0x000000ED 0x0000000000000000 # "MSR_RAR_CONTROL (Table: 2-52)"
+# 0x000000EE 0x0000000000000000 # "MSR_RAR_ACTION_VECTOR_BASE (Table: 2-52)"
+# 0x000000EF 0x0000000000000000 # "MSR_RAR_PAYLOAD_TABLE_BASE (Table: 2-52)"
+# 0x000000F0 0x0000000000000000 # "MSR_RAR_INFO (Table: 2-52)"
+# 0x00000105 0x0000000000000000 # "MSR_CORE_BIST (Table: 2-52)"
+# 0x0000010A 0x0000000000000000 # "IA32_ARCH_CAPABILITIES (Table: 2-52)"
+# 0x000001C4 0x0000000000000000 # "IA32_XFD (Table: 2-52)"
+# 0x000001C5 0x0000000000000000 # "IA32_XFD_ERR (Table: 2-52)"
+# 0x000002C2 0x0000000000000000 # "MSR_COPY_SCAN_HASHES (Table: 2-52)"
+# 0x000002C3 0x0000000000000000 # "MSR_SCAN_HASHES_STATUS (Table: 2-52)"
+# 0x000002C4 0x0000000000000000 # "MSR_AUTHENTICATE_AND_COPY_CHUNK (Table: 2-52)"
+# 0x000002C5 0x0000000000000000 # "MSR_CHUNKS_AUTHENTICATION_STATUS (Table: 2-52)"
+# 0x000002C6 0x0000000000000000 # "MSR_ACTIVATE_SCAN (Table: 2-52)"
+# 0x000002C7 0x0000000000000000 # "MSR_SCAN_STATUS (Table: 2-52)"
+# 0x000002C8 0x0000000000000000 # "MSR_SCAN_MODULE_ID (Table: 2-52)"
+# 0x000002C9 0x0000000000000000 # "MSR_LAST_SAF_WP (Table: 2-52)"
+# 0x000002D9 0x0000000000000000 # "MSR_INTEGRITY_CAPABILITIES (Table: 2-52)"
+# 0x00000412 0x0000000000000000 # "IA32_MC4_ADDR (Table: 2-52)"
+# 0x00000413 0x0000000000000000 # "IA32_MC4_MISC (Table: 2-52)"
+# 0x00000492 0x0000000000000000 # "IA32_VMX_PROCBASED_CTLS3 (Table: 2-52)"
+# 0x00000493 0x0000000000000000 # "IA32_VMX_EXIT_CTLS2 (Table: 2-52)"
+# 0x00000540 0x0000000000000000 # "MSR_THREAD_UARCH_CTL (Table: 2-52)"
+# 0x0000065C 0x0000000000000000 # "MSR_PLATFORM_POWER_LIMIT (Table: 2-52)"
+# 0x000006A0 0x0000000000000000 # "IA32_U_CET (Table: 2-52)"
+# 0x000006A2 0x0000000000000000 # "IA32_S_CET (Table: 2-52)"
+# 0x000006A4 0x0000000000000000 # "IA32_PL0_SSP (Table: 2-52)"
+# 0x000006A5 0x0000000000000000 # "IA32_PL1_SSP (Table: 2-52)"
+# 0x000006A6 0x0000000000000000 # "IA32_PL2_SSP (Table: 2-52)"
+# 0x000006A7 0x0000000000000000 # "IA32_PL3_SSP (Table: 2-52)"
+# 0x000006A8 0x0000000000000000 # "IA32_INTERRUPT_SSP_TABLE_ADDR (Table: 2-52)"
+# 0x000006E1 0x0000000000000000 # "IA32_PKRS (Table: 2-52)"
+# 0x00000776 0x0000000000000000 # "IA32_HWP_CTL (Table: 2-52)"
+# 0x00000981 0x0000000000000000 # "IA32_TME_CAPABILITY (Table: 2-52)"
+# 0x00000985 0x0000000000000000 # "IA32_UINTR_RR (Table: 2-52)"
+# 0x00000986 0x0000000000000000 # "IA32_UINTR_HANDLER (Table: 2-52)"
+# 0x00000987 0x0000000000000000 # "IA32_UINTR_STACKADJUST (Table: 2-52)"
+# 0x00000988 0x0000000000000000 # "IA32_UINTR_MISC (Table: 2-52)"
+# 0x00000989 0x0000000000000000 # "IA32_UINTR_PD (Table: 2-52)"
+# 0x0000098A 0x0000000000000000 # "IA32_UINTR_TT (Table: 2-52)"
+# 0x00000C70 0x0000000000000000 # "MSR_B1_PMON_EVNT_SEL0 (Table: 2-52)"
+# 0x00000C71 0x0000000000000000 # "MSR_B1_PMON_CTR0 (Table: 2-52)"
+# 0x00000C72 0x0000000000000000 # "MSR_B1_PMON_EVNT_SEL1 (Table: 2-52)"
+# 0x00000C73 0x0000000000000000 # "MSR_B1_PMON_CTR1 (Table: 2-52)"
+# 0x00000C74 0x0000000000000000 # "MSR_B1_PMON_EVNT_SEL2 (Table: 2-52)"
+# 0x00000C75 0x0000000000000000 # "MSR_B1_PMON_CTR2 (Table: 2-52)"
+# 0x00000C76 0x0000000000000000 # "MSR_B1_PMON_EVNT_SEL3 (Table: 2-52)"
+# 0x00000C77 0x0000000000000000 # "MSR_B1_PMON_CTR3 (Table: 2-52)"
+# 0x00000C82 0x0000000000000000 # "MSR_W_PMON_BOX_OVF_CTRL (Table: 2-52)"
+# 0x00000D10 0x0000000000000000 # "IA32_L2_QOS_MASK_0 (Table: 2-52)"
+# 0x00000D11 0x0000000000000000 # "IA32_L2_QOS_MASK_1 (Table: 2-52)"
+# 0x00000D12 0x0000000000000000 # "IA32_L2_QOS_MASK_2 (Table: 2-52)"
+# 0x00000D13 0x0000000000000000 # "IA32_L2_QOS_MASK_3 (Table: 2-52)"
+# 0x00000D14 0x0000000000000000 # "IA32_L2_QOS_MASK_4 (Table: 2-52)"
+# 0x00000D15 0x0000000000000000 # "IA32_L2_QOS_MASK_5 (Table: 2-52)"
+# 0x00000D16 0x0000000000000000 # "IA32_L2_QOS_MASK_6 (Table: 2-52)"
+# 0x00000D17 0x0000000000000000 # "IA32_L2_QOS_MASK_7 (Table: 2-52)"
+# 0x00000D93 0x0000000000000000 # "IA32_PASID (Table: 2-52)"
+# 0x00001200 0x0000000000000000 # "IA32_LBR_0_INFO (Table: 2-52)"
+# 0x00001201 0x0000000000000000 # "IA32_LBR_1_INFO (Table: 2-52)"
+# 0x00001202 0x0000000000000000 # "IA32_LBR_2_INFO (Table: 2-52)"
+# 0x00001203 0x0000000000000000 # "IA32_LBR_3_INFO (Table: 2-52)"
+# 0x00001204 0x0000000000000000 # "IA32_LBR_4_INFO (Table: 2-52)"
+# 0x00001205 0x0000000000000000 # "IA32_LBR_5_INFO (Table: 2-52)"
+# 0x00001206 0x0000000000000000 # "IA32_LBR_6_INFO (Table: 2-52)"
+# 0x00001207 0x0000000000000000 # "IA32_LBR_7_INFO (Table: 2-52)"
+# 0x00001208 0x0000000000000000 # "IA32_LBR_8_INFO (Table: 2-52)"
+# 0x00001209 0x0000000000000000 # "IA32_LBR_9_INFO (Table: 2-52)"
+# 0x0000120A 0x0000000000000000 # "IA32_LBR_10_INFO (Table: 2-52)"
+# 0x0000120B 0x0000000000000000 # "IA32_LBR_11_INFO (Table: 2-52)"
+# 0x0000120C 0x0000000000000000 # "IA32_LBR_12_INFO (Table: 2-52)"
+# 0x0000120D 0x0000000000000000 # "IA32_LBR_13_INFO (Table: 2-52)"
+# 0x0000120E 0x0000000000000000 # "IA32_LBR_14_INFO (Table: 2-52)"
+# 0x0000120F 0x0000000000000000 # "IA32_LBR_15_INFO (Table: 2-52)"
+# 0x00001210 0x0000000000000000 # "IA32_LBR_16_INFO (Table: 2-52)"
+# 0x00001211 0x0000000000000000 # "IA32_LBR_17_INFO (Table: 2-52)"
+# 0x00001212 0x0000000000000000 # "IA32_LBR_18_INFO (Table: 2-52)"
+# 0x00001213 0x0000000000000000 # "IA32_LBR_19_INFO (Table: 2-52)"
+# 0x00001214 0x0000000000000000 # "IA32_LBR_20_INFO (Table: 2-52)"
+# 0x00001215 0x0000000000000000 # "IA32_LBR_21_INFO (Table: 2-52)"
+# 0x00001216 0x0000000000000000 # "IA32_LBR_22_INFO (Table: 2-52)"
+# 0x00001217 0x0000000000000000 # "IA32_LBR_23_INFO (Table: 2-52)"
+# 0x00001218 0x0000000000000000 # "IA32_LBR_24_INFO (Table: 2-52)"
+# 0x00001219 0x0000000000000000 # "IA32_LBR_25_INFO (Table: 2-52)"
+# 0x0000121A 0x0000000000000000 # "IA32_LBR_26_INFO (Table: 2-52)"
+# 0x0000121B 0x0000000000000000 # "IA32_LBR_27_INFO (Table: 2-52)"
+# 0x0000121C 0x0000000000000000 # "IA32_LBR_28_INFO (Table: 2-52)"
+# 0x0000121D 0x0000000000000000 # "IA32_LBR_29_INFO (Table: 2-52)"
+# 0x0000121E 0x0000000000000000 # "IA32_LBR_30_INFO (Table: 2-52)"
+# 0x0000121F 0x0000000000000000 # "IA32_LBR_31_INFO (Table: 2-52)"
+# 0x00001406 0x0000000000000000 # "IA32_MCU_CONTROL (Table: 2-52)"
+# 0x000014CE 0x0000000000000000 # "IA32_LBR_CTL (Table: 2-52)"
+# 0x000014CF 0x0000000000000000 # "IA32_LBR_DEPTH (Table: 2-52)"
+# 0x00001500 0x0000000000000000 # "IA32_LBR_0_FROM_IP (Table: 2-52)"
+# 0x00001501 0x0000000000000000 # "IA32_LBR_1_FROM_IP (Table: 2-52)"
+# 0x00001502 0x0000000000000000 # "IA32_LBR_2_FROM_IP (Table: 2-52)"
+# 0x00001503 0x0000000000000000 # "IA32_LBR_3_FROM_IP (Table: 2-52)"
+# 0x00001504 0x0000000000000000 # "IA32_LBR_4_FROM_IP (Table: 2-52)"
+# 0x00001505 0x0000000000000000 # "IA32_LBR_5_FROM_IP (Table: 2-52)"
+# 0x00001506 0x0000000000000000 # "IA32_LBR_6_FROM_IP (Table: 2-52)"
+# 0x00001507 0x0000000000000000 # "IA32_LBR_7_FROM_IP (Table: 2-52)"
+# 0x00001508 0x0000000000000000 # "IA32_LBR_8_FROM_IP (Table: 2-52)"
+# 0x00001509 0x0000000000000000 # "IA32_LBR_9_FROM_IP (Table: 2-52)"
+# 0x0000150A 0x0000000000000000 # "IA32_LBR_10_FROM_IP (Table: 2-52)"
+# 0x0000150B 0x0000000000000000 # "IA32_LBR_11_FROM_IP (Table: 2-52)"
+# 0x0000150C 0x0000000000000000 # "IA32_LBR_12_FROM_IP (Table: 2-52)"
+# 0x0000150D 0x0000000000000000 # "IA32_LBR_13_FROM_IP (Table: 2-52)"
+# 0x0000150E 0x0000000000000000 # "IA32_LBR_14_FROM_IP (Table: 2-52)"
+# 0x0000150F 0x0000000000000000 # "IA32_LBR_15_FROM_IP (Table: 2-52)"
+# 0x00001510 0x0000000000000000 # "IA32_LBR_16_FROM_IP (Table: 2-52)"
+# 0x00001511 0x0000000000000000 # "IA32_LBR_17_FROM_IP (Table: 2-52)"
+# 0x00001512 0x0000000000000000 # "IA32_LBR_18_FROM_IP (Table: 2-52)"
+# 0x00001513 0x0000000000000000 # "IA32_LBR_19_FROM_IP (Table: 2-52)"
+# 0x00001514 0x0000000000000000 # "IA32_LBR_20_FROM_IP (Table: 2-52)"
+# 0x00001515 0x0000000000000000 # "IA32_LBR_21_FROM_IP (Table: 2-52)"
+# 0x00001516 0x0000000000000000 # "IA32_LBR_22_FROM_IP (Table: 2-52)"
+# 0x00001517 0x0000000000000000 # "IA32_LBR_23_FROM_IP (Table: 2-52)"
+# 0x00001518 0x0000000000000000 # "IA32_LBR_24_FROM_IP (Table: 2-52)"
+# 0x00001519 0x0000000000000000 # "IA32_LBR_25_FROM_IP (Table: 2-52)"
+# 0x0000151A 0x0000000000000000 # "IA32_LBR_26_FROM_IP (Table: 2-52)"
+# 0x0000151B 0x0000000000000000 # "IA32_LBR_27_FROM_IP (Table: 2-52)"
+# 0x0000151C 0x0000000000000000 # "IA32_LBR_28_FROM_IP (Table: 2-52)"
+# 0x0000151D 0x0000000000000000 # "IA32_LBR_29_FROM_IP (Table: 2-52)"
+# 0x0000151E 0x0000000000000000 # "IA32_LBR_30_FROM_IP (Table: 2-52)"
+# 0x0000151F 0x0000000000000000 # "IA32_LBR_31_FROM_IP (Table: 2-52)"
+# 0x00001600 0x0000000000000000 # "IA32_LBR_0_TO_IP (Table: 2-52)"
+# 0x00001601 0x0000000000000000 # "IA32_LBR_1_TO_IP (Table: 2-52)"
+# 0x00001602 0x0000000000000000 # "IA32_LBR_2_TO_IP (Table: 2-52)"
+# 0x00001603 0x0000000000000000 # "IA32_LBR_3_TO_IP (Table: 2-52)"
+# 0x00001604 0x0000000000000000 # "IA32_LBR_4_TO_IP (Table: 2-52)"
+# 0x00001605 0x0000000000000000 # "IA32_LBR_5_TO_IP (Table: 2-52)"
+# 0x00001606 0x0000000000000000 # "IA32_LBR_6_TO_IP (Table: 2-52)"
+# 0x00001607 0x0000000000000000 # "IA32_LBR_7_TO_IP (Table: 2-52)"
+# 0x00001608 0x0000000000000000 # "IA32_LBR_8_TO_IP (Table: 2-52)"
+# 0x00001609 0x0000000000000000 # "IA32_LBR_9_TO_IP (Table: 2-52)"
+# 0x0000160A 0x0000000000000000 # "IA32_LBR_10_TO_IP (Table: 2-52)"
+# 0x0000160B 0x0000000000000000 # "IA32_LBR_11_TO_IP (Table: 2-52)"
+# 0x0000160C 0x0000000000000000 # "IA32_LBR_12_TO_IP (Table: 2-52)"
+# 0x0000160D 0x0000000000000000 # "IA32_LBR_13_TO_IP (Table: 2-52)"
+# 0x0000160E 0x0000000000000000 # "IA32_LBR_14_TO_IP (Table: 2-52)"
+# 0x0000160F 0x0000000000000000 # "IA32_LBR_15_TO_IP (Table: 2-52)"
+# 0x00001610 0x0000000000000000 # "IA32_LBR_16_TO_IP (Table: 2-52)"
+# 0x00001611 0x0000000000000000 # "IA32_LBR_17_TO_IP (Table: 2-52)"
+# 0x00001612 0x0000000000000000 # "IA32_LBR_18_TO_IP (Table: 2-52)"
+# 0x00001613 0x0000000000000000 # "IA32_LBR_19_TO_IP (Table: 2-52)"
+# 0x00001614 0x0000000000000000 # "IA32_LBR_20_TO_IP (Table: 2-52)"
+# 0x00001615 0x0000000000000000 # "IA32_LBR_21_TO_IP (Table: 2-52)"
+# 0x00001616 0x0000000000000000 # "IA32_LBR_22_TO_IP (Table: 2-52)"
+# 0x00001617 0x0000000000000000 # "IA32_LBR_23_TO_IP (Table: 2-52)"
+# 0x00001618 0x0000000000000000 # "IA32_LBR_24_TO_IP (Table: 2-52)"
+# 0x00001619 0x0000000000000000 # "IA32_LBR_25_TO_IP (Table: 2-52)"
+# 0x0000161A 0x0000000000000000 # "IA32_LBR_26_TO_IP (Table: 2-52)"
+# 0x0000161B 0x0000000000000000 # "IA32_LBR_27_TO_IP (Table: 2-52)"
+# 0x0000161C 0x0000000000000000 # "IA32_LBR_28_TO_IP (Table: 2-52)"
+# 0x0000161D 0x0000000000000000 # "IA32_LBR_29_TO_IP (Table: 2-52)"
+# 0x0000161E 0x0000000000000000 # "IA32_LBR_30_TO_IP (Table: 2-52)"
+# 0x0000161F 0x0000000000000000 # "IA32_LBR_31_TO_IP (Table: 2-52)"
\ No newline at end of file