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CoreBassier.qsf
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CoreBassier.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors. Please
# refer to the applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
# Date created = 15:28:19 July 04, 2018
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# CoreBassier_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE115F29C7
set_global_assignment -name TOP_LEVEL_ENTITY main
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:28:19 JULY 04, 2018"
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name SAVE_DISK_SPACE OFF
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MINIMUM
set_global_assignment -name OPTIMIZE_TIMING OFF
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING OFF
set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION NEVER
set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION NEVER
set_global_assignment -name FITTER_EFFORT "FAST FIT"
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT FAST
set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION OFF
set_global_assignment -name ALM_REGISTER_PACKING_EFFORT LOW
set_location_assignment PIN_G18 -to hex0[6]
set_location_assignment PIN_F22 -to hex0[5]
set_location_assignment PIN_E17 -to hex0[4]
set_location_assignment PIN_L26 -to hex0[3]
set_location_assignment PIN_L25 -to hex0[2]
set_location_assignment PIN_J22 -to hex0[1]
set_location_assignment PIN_H22 -to hex0[0]
set_location_assignment PIN_M24 -to hex1[6]
set_location_assignment PIN_Y22 -to hex1[5]
set_location_assignment PIN_W21 -to hex1[4]
set_location_assignment PIN_W22 -to hex1[3]
set_location_assignment PIN_W25 -to hex1[2]
set_location_assignment PIN_U23 -to hex1[1]
set_location_assignment PIN_U24 -to hex1[0]
set_location_assignment PIN_AA25 -to hex2[6]
set_location_assignment PIN_AA26 -to hex2[5]
set_location_assignment PIN_Y25 -to hex2[4]
set_location_assignment PIN_W26 -to hex2[3]
set_location_assignment PIN_Y26 -to hex2[2]
set_location_assignment PIN_W27 -to hex2[1]
set_location_assignment PIN_W28 -to hex2[0]
set_location_assignment PIN_V21 -to hex3[6]
set_location_assignment PIN_U21 -to hex3[5]
set_location_assignment PIN_AB20 -to hex3[4]
set_location_assignment PIN_AA21 -to hex3[3]
set_location_assignment PIN_AD24 -to hex3[2]
set_location_assignment PIN_AF23 -to hex3[1]
set_location_assignment PIN_Y19 -to hex3[0]
set_location_assignment PIN_AB19 -to hex4[6]
set_location_assignment PIN_AA19 -to hex4[5]
set_location_assignment PIN_AG21 -to hex4[4]
set_location_assignment PIN_AH21 -to hex4[3]
set_location_assignment PIN_AE19 -to hex4[2]
set_location_assignment PIN_AF19 -to hex4[1]
set_location_assignment PIN_AE18 -to hex4[0]
set_location_assignment PIN_AD18 -to hex5[6]
set_location_assignment PIN_AC18 -to hex5[5]
set_location_assignment PIN_AB18 -to hex5[4]
set_location_assignment PIN_AH19 -to hex5[3]
set_location_assignment PIN_AG19 -to hex5[2]
set_location_assignment PIN_AF18 -to hex5[1]
set_location_assignment PIN_AH18 -to hex5[0]
set_location_assignment PIN_AA17 -to hex6[6]
set_location_assignment PIN_AB16 -to hex6[5]
set_location_assignment PIN_AA16 -to hex6[4]
set_location_assignment PIN_AB17 -to hex6[3]
set_location_assignment PIN_AB15 -to hex6[2]
set_location_assignment PIN_AA15 -to hex6[1]
set_location_assignment PIN_AC17 -to hex6[0]
set_location_assignment PIN_AD17 -to hex7[6]
set_location_assignment PIN_AE17 -to hex7[5]
set_location_assignment PIN_AG17 -to hex7[4]
set_location_assignment PIN_AH17 -to hex7[3]
set_location_assignment PIN_AF17 -to hex7[2]
set_location_assignment PIN_AG18 -to hex7[1]
set_location_assignment PIN_AA14 -to hex7[0]
set_location_assignment PIN_Y2 -to clock
set_location_assignment PIN_M23 -to key0
set_location_assignment PIN_M21 -to key1
set_location_assignment PIN_N21 -to key2
set_location_assignment PIN_R24 -to key3
set_location_assignment PIN_AB28 -to sw0
set_location_assignment PIN_AC28 -to sw1
set_location_assignment PIN_AC27 -to sw2
set_location_assignment PIN_AD27 -to sw3
set_location_assignment PIN_AB27 -to sw4
set_location_assignment PIN_AC26 -to sw5
set_location_assignment PIN_AD26 -to sw6
set_location_assignment PIN_AB26 -to sw7
set_location_assignment PIN_AC25 -to sw8
set_location_assignment PIN_AB25 -to sw9
set_location_assignment PIN_AC24 -to sw10
set_location_assignment PIN_AB24 -to sw11
set_location_assignment PIN_AB23 -to sw12
set_location_assignment PIN_AA24 -to sw13
set_location_assignment PIN_AA23 -to sw14
set_location_assignment PIN_AA22 -to sw15
set_location_assignment PIN_Y24 -to sw16
set_location_assignment PIN_Y23 -to sw17
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VERILOG_FILE divfreq.v
set_global_assignment -name VERILOG_FILE teste.v
set_global_assignment -name VERILOG_FILE main.v
set_global_assignment -name VERILOG_FILE PC/PC.v
set_global_assignment -name VERILOG_FILE IO/IO.v
set_global_assignment -name VERILOG_FILE InstructionsMemory/InstructionsMemory.v
set_global_assignment -name VERILOG_FILE DataMemory/DataMemory.v
set_global_assignment -name VERILOG_FILE ControlUnit/ControlUnit.v
set_global_assignment -name VERILOG_FILE ALU/ALU.v
set_global_assignment -name VERILOG_FILE RegistersBank/RegistersBank.v
set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top