From 0803c0e37771882e6baf5d4d5f56dc496448d755 Mon Sep 17 00:00:00 2001 From: czw <1753182770@qq.com> Date: Sat, 8 Oct 2022 16:39:42 +0800 Subject: [PATCH 1/2] support for spike --- am/arch/isa/riscv64.mk | 12 ++++++++-- am/arch/platform/spike.mk | 33 +++++++++++++++++++++++++++ am/arch/riscv64-spike.mk | 13 +++++++++++ am/include/arch/riscv64-spike.h | 1 + am/src/nemu/isa/riscv/cte64.c | 2 +- am/src/spike/isa/riscv/boot/start.S | 21 +++++++++++++++++ am/src/spike/isa/riscv/trm.c | 14 ++++++++++++ am/src/spike/ldscript/section.ld | 35 +++++++++++++++++++++++++++++ 8 files changed, 128 insertions(+), 3 deletions(-) create mode 100644 am/arch/platform/spike.mk create mode 100644 am/arch/riscv64-spike.mk create mode 100644 am/include/arch/riscv64-spike.h create mode 100644 am/src/spike/isa/riscv/boot/start.S create mode 100644 am/src/spike/isa/riscv/trm.c create mode 100644 am/src/spike/ldscript/section.ld diff --git a/am/arch/isa/riscv64.mk b/am/arch/isa/riscv64.mk index c04c9538..3d9eb957 100644 --- a/am/arch/isa/riscv64.mk +++ b/am/arch/isa/riscv64.mk @@ -1,9 +1,17 @@ +HAS_RVV=0 + ifeq ($(LINUX_GNU_TOOLCHAIN),1) +RV_MARCH = rv64gc CROSS_COMPILE := riscv64-linux-gnu- -COMMON_FLAGS := -fno-pic -march=rv64gc -mcmodel=medany +COMMON_FLAGS := -fno-pic -march=$(RV_MARCH) -mcmodel=medany +else ifeq ($(HAS_RVV),1) +RV_MARCH = rv64gcv_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed_zksh_zkt +CROSS_COMPILE := /nfs/home/share/riscv-v/bin/riscv64-unknown-linux-gnu- +COMMON_FLAGS := -fno-pic -march=$(RV_MARCH) -mriscv-vector-bits=256 -mcmodel=medany else +RV_MARCH = rv64gc_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed_zksh_zkt CROSS_COMPILE := riscv64-unknown-linux-gnu- -COMMON_FLAGS := -fno-pic -march=rv64gc_zba_zbb_zbc_zbs_zbkb_zbkc_zbkx_zknd_zkne_zknh_zkr_zksed_zksh_zkt -mcmodel=medany +COMMON_FLAGS := -fno-pic -march=$(RV_MARCH) -mcmodel=medany endif CFLAGS += $(COMMON_FLAGS) -static ASFLAGS += $(COMMON_FLAGS) -O0 diff --git a/am/arch/platform/spike.mk b/am/arch/platform/spike.mk new file mode 100644 index 00000000..2fe25931 --- /dev/null +++ b/am/arch/platform/spike.mk @@ -0,0 +1,33 @@ +AM_SRCS += nemu/common/trm.c \ + nemu/common/mainargs.S \ + nemu/common/ioe.c \ + nemu/common/input.c \ + nemu/common/timer.c \ + nemu/common/video.c \ + nemu/common/audio.c \ + dummy/mpe.c \ + +CFLAGS += -I$(AM_HOME)/am/src/nemu/include +ASFLAGS += -DMAINARGS=\"$(mainargs)\" +.PHONY: $(AM_HOME)/am/src/nemu/common/mainargs.S + +LDFLAGS += -L $(AM_HOME)/am/src/spike/ldscript + +NEMU_ARGS += -l --isa=$(RV_MARCH) +ifeq ($(HAS_RVV),1) +NEMU_ARGS += --varch=vlen:256,elen:64 +endif +NEMU_ARGS += $(BINARY).elf 2> $(BINARY).log + +image: + @echo + LD "->" $(BINARY_REL).elf + @$(LD) $(LDFLAGS) --gc-sections -o $(BINARY).elf $(LINK_FILES) + @$(OBJDUMP) -d $(BINARY).elf > $(BINARY).txt + @echo + OBJCOPY "->" $(BINARY_REL).bin + @$(OBJCOPY) -S --set-section-flags .bss=alloc,contents -O binary $(BINARY).elf $(BINARY).bin + +run:image + spike $(NEMU_ARGS) + +gdb: image + spike -d $(NEMU_ARGS) diff --git a/am/arch/riscv64-spike.mk b/am/arch/riscv64-spike.mk new file mode 100644 index 00000000..c71313db --- /dev/null +++ b/am/arch/riscv64-spike.mk @@ -0,0 +1,13 @@ +include $(AM_HOME)/am/arch/isa/riscv64.mk +include $(AM_HOME)/am/arch/platform/spike.mk + +AM_SRCS += spike/isa/riscv/trm.c \ + nemu/isa/riscv/cte.c \ + nemu/isa/riscv/trap.S \ + nemu/isa/riscv/cte64.c \ + nemu/isa/riscv/mtime.S \ + nemu/isa/riscv/vme.c \ + spike/isa/riscv/boot/start.S + +CFLAGS += -DISA_H=\"riscv.h\" +LDFLAGS += -T $(AM_HOME)/am/src/nemu/isa/riscv/boot/loader64.ld diff --git a/am/include/arch/riscv64-spike.h b/am/include/arch/riscv64-spike.h new file mode 100644 index 00000000..f8475f59 --- /dev/null +++ b/am/include/arch/riscv64-spike.h @@ -0,0 +1 @@ +#include "riscv32-nemu.h" \ No newline at end of file diff --git a/am/src/nemu/isa/riscv/cte64.c b/am/src/nemu/isa/riscv/cte64.c index f2e6db6a..6cc13859 100644 --- a/am/src/nemu/isa/riscv/cte64.c +++ b/am/src/nemu/isa/riscv/cte64.c @@ -14,7 +14,7 @@ extern void enable_timer(); extern void init_pmp(); extern void enable_pmp(uintptr_t pmp_reg, uintptr_t pmp_addr, uintptr_t pmp_size, uint8_t lock, uint8_t permission); extern void enable_pmp_TOR(uintptr_t pmp_reg, uintptr_t pmp_addr, uintptr_t pmp_size, bool lock, uint8_t permission); -#include +// #include static void init_eip() { // enable machine external interrupt (mie.meip and mstatus.mie) diff --git a/am/src/spike/isa/riscv/boot/start.S b/am/src/spike/isa/riscv/boot/start.S new file mode 100644 index 00000000..ff332802 --- /dev/null +++ b/am/src/spike/isa/riscv/boot/start.S @@ -0,0 +1,21 @@ +.section entry, "ax" +.globl _start +.type _start, @function + +#define MSTATUS_FS 0x00006000 + +_start: + mv s0, zero + la sp, _stack_pointer + li a0, MSTATUS_FS & (MSTATUS_FS >> 1) + csrs mstatus, a0 + csrwi fcsr, 0 + jal _trm_init + +.section ".tohost","aw",@progbits +.align 6 +.globl tohost +tohost: .dword 0 +.align 6 +.globl fromhost +fromhost: .dword 0 \ No newline at end of file diff --git a/am/src/spike/isa/riscv/trm.c b/am/src/spike/isa/riscv/trm.c new file mode 100644 index 00000000..e2c55065 --- /dev/null +++ b/am/src/spike/isa/riscv/trm.c @@ -0,0 +1,14 @@ +#include + +void _putc(char ch) { + outb(0xa10003f8, ch); +} + +extern volatile uint64_t tohost; +extern volatile uint64_t fromhost; + +void _halt(int code) { + tohost = (code << 1) | 1; + + while (1); +} diff --git a/am/src/spike/ldscript/section.ld b/am/src/spike/ldscript/section.ld new file mode 100644 index 00000000..7d83a2b5 --- /dev/null +++ b/am/src/spike/ldscript/section.ld @@ -0,0 +1,35 @@ +ENTRY(_start) + +SECTIONS { + . = ORIGIN(ram); + .text : { + *(entry) + *(.text) + } + etext = .; + _etext = .; + .rodata : { + *(.rodata*) + } + .data : { + *(.data) + } + edata = .; + _data = .; + .bss : { + _bss_start = .; + *(.bss*) + *(.sbss*) + *(.scommon) + } + _stack_top = ALIGN(0x1000); + . = _stack_top + 0x8000; + _stack_pointer = .; + end = .; + _end = .; + _heap_start = ALIGN(0x1000); + _pmem_start = pmem_base; + _pmem_end = _pmem_start + LENGTH(ram); + . = ALIGN(0x1000); + .tohost : { *(.tohost) } +} From 7a60becd857b39f80972b10653ca464063e7132b Mon Sep 17 00:00:00 2001 From: czw <1753182770@qq.com> Date: Wed, 12 Oct 2022 12:13:26 +0800 Subject: [PATCH 2/2] arch: add support for spike finished: 1. add _putc() for spike todo: 1. add other system calls for spike --- am/src/spike/isa/riscv/trm.c | 46 ++++++++++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/am/src/spike/isa/riscv/trm.c b/am/src/spike/isa/riscv/trm.c index e2c55065..f4be818b 100644 --- a/am/src/spike/isa/riscv/trm.c +++ b/am/src/spike/isa/riscv/trm.c @@ -1,14 +1,50 @@ #include -void _putc(char ch) { - outb(0xa10003f8, ch); -} - extern volatile uint64_t tohost; extern volatile uint64_t fromhost; +# define TOHOST_CMD(dev, cmd, payload) \ + (((uint64_t)(dev) << 56) | ((uint64_t)(cmd) << 48) | (uint64_t)(payload)) +#define FROMHOST_DEV(fromhost_value) ((uint64_t)(fromhost_value) >> 56) +#define FROMHOST_CMD(fromhost_value) ((uint64_t)(fromhost_value) << 8 >> 56) +#define FROMHOST_DATA(fromhost_value) ((uint64_t)(fromhost_value) << 16 >> 16) +volatile int htif_console_buf; + +static void __check_fromhost() +{ + uint64_t fh = fromhost; + if (!fh) + return; + fromhost = 0; + + // this should be from the console + // assert(FROMHOST_DEV(fh) == 1); + switch (FROMHOST_CMD(fh)) { + case 0: + htif_console_buf = 1 + (uint8_t)FROMHOST_DATA(fh); + break; + case 1: + break; + default: + // assert(0); + ; + } +} + +static void __set_tohost(uintptr_t dev, uintptr_t cmd, uintptr_t data) +{ + while (tohost) // tohost need to be 0 + __check_fromhost() // fromhost need to be 0 + ; + tohost = TOHOST_CMD(dev, cmd, data); +} + +void _putc(char ch) +{ + __set_tohost(1, 1, ch); +} void _halt(int code) { - tohost = (code << 1) | 1; + __set_tohost(0, 0, (code << 1) | 1); while (1); }