diff --git a/src/target/adiv5.c b/src/target/adiv5.c
index 94960ab0473..8fcb9009276 100644
--- a/src/target/adiv5.c
+++ b/src/target/adiv5.c
@@ -452,6 +452,8 @@ static uint32_t cortexm_initial_halt(adiv5_access_port_s *ap)
 		if ((dhcsr & (CORTEXM_DHCSR_S_HALT | CORTEXM_DHCSR_C_DEBUGEN)) ==
 			(CORTEXM_DHCSR_S_HALT | CORTEXM_DHCSR_C_DEBUGEN))
 			return dhcsr;
+		/* Reduce spam-polling */
+		platform_delay(1);
 	}
 
 	return 0U;
@@ -508,6 +510,8 @@ static bool cortexm_prepare(adiv5_access_port_s *ap)
 			DEBUG_ERROR("Error releasing from reset\n");
 			return false;
 		}
+		/* Reduce spam-polling */
+		platform_delay(2);
 	}
 	/* Core is now in a good state */
 	return true;
@@ -922,6 +926,8 @@ void adiv5_dp_init(adiv5_debug_port_s *const dp)
 			DEBUG_WARN("adiv5: power-down failed\n");
 			break;
 		}
+		/* Reduce spam-polling */
+		platform_delay(3);
 	}
 
 	platform_timeout_set(&timeout, 201);
diff --git a/src/target/adiv5_swd.c b/src/target/adiv5_swd.c
index 52a0a034a70..4dd88a5811f 100644
--- a/src/target/adiv5_swd.c
+++ b/src/target/adiv5_swd.c
@@ -395,6 +395,9 @@ uint32_t firmware_swdp_low_access(adiv5_debug_port_s *dp, const uint8_t RnW, con
 				ADIV5_DP_ABORT_ORUNERRCLR | ADIV5_DP_ABORT_WDERRCLR | ADIV5_DP_ABORT_STKERRCLR |
 					ADIV5_DP_ABORT_STKCMPCLR);
 		}
+		/* Reduce spam-polling on SWDP WAIT */
+		if (ack == SWDP_ACK_WAIT)
+			platform_delay(1);
 	} while ((ack == SWDP_ACK_WAIT || ack == SWDP_ACK_FAULT) && !platform_timeout_is_expired(&timeout));
 
 	if (ack == SWDP_ACK_WAIT) {