From d882f42803e7229508985002efc55cd98c165bae Mon Sep 17 00:00:00 2001 From: "R. Timothy Edwards" Date: Mon, 9 May 2022 01:51:29 -0400 Subject: [PATCH] Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. (#90) * Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. This commit does the following: (1) Corrects the xschem simple_por schematic to separate the 1.8V and 3.3V grounds. (2) Corrects the xschem simple_por symbol to separate the 1.8V and 3.3V grounds. (3) Corrects the xschem testbench to connect to both grounds of simple_por. (4) Corrects the simple_por layout to remove the 1.8V logic from the 3.3V ground and connect it instead to the 1.8V ground. (5) Extends the top-level power routing of caravel and caravan to make a better connection to the simple_por 1.8V ground. (6) Adds an LVS script to properly check the simple_por layout against the xschem-generated schematic netlist. NOTE: None of these modifications change the function of any circuit. The 1.8V and 3.3V ground nets are only logically separated in the netlists but share the substrate. This fix cleanly defines the 1.8V and 3.3V grounds within the simple_por, where they were previously mingled. It also ensures that the full LVS for caravel and caravan can now include the simple_por at the transistor level and still pass. * Updated the GDS of simple_por (previously did not remove GDS_FILE from the .mag file and so it just overwrote the original GDS file with itself). * Corrected a route to simple_por in the top level of both caravel and caravan that was shorting to the extra metals put on top of the substrate contact across the top (bottom, in the top level) of the simple_por layout. --- gds/simple_por.gds.gz | Bin 71272 -> 85266 bytes mag/caravan.mag | 78 +++++----- mag/caravan_power_routing.mag | 142 ++++++++--------- mag/caravel.mag | 112 +++++++------- mag/caravel_power_routing.mag | 146 +++++++++--------- mag/simple_por.mag | 133 +++++++++------- xschem/run_simple_por_lvs.sh | 46 ++++++ xschem/simple_por.sch | 65 ++++---- xschem/simple_por.spice | 282 +++++++--------------------------- xschem/simple_por.sym | 9 +- xschem/simple_por_tb.sch | 1 + xschem/simple_por_tb.spice | 120 +++++++++------ 12 files changed, 536 insertions(+), 598 deletions(-) create mode 100755 xschem/run_simple_por_lvs.sh diff --git a/gds/simple_por.gds.gz b/gds/simple_por.gds.gz index fda0103293a609ead165f0e0e2dbe3ae0d87e158..5c38b938b9c6a375b413d6de967fc7d9526a42d8 100644 GIT binary patch literal 85266 zcmcG$d0dl6_cwgEw#8O71!_TAQV~U^f~YLABvqkUQE*3#Aq8qt5h6keOP01O5E0N? zSC%MLQCR|23~N#i5R@fQgrG@?5Fkh(0Rq{R>zO3Bci-Rg-2c2!KOdXxTr+cK=A4-` z=X}pxz_SWWO+`MRY~&ZANFyZkMBwO@!~|_``bR)`q6tgKbe5~ zU&R(C?j5A}>?FO0L_unyh)bzCB5l-kRcHqJ8XjS1;ZFOV_Q4BceSXzf9|)fao7k(u z>`_9R>-E1balx*`O1s}qR8tyeXMAPaRcZ*!xb{Dk2JfP`X!ChtqGe+$r_ncU(o=Y#MtJic0Ie(Y{3gXIAhM zo0+?3Sp_)lxG>b4df?&I(RJ8~{yUG$Up`3Byg(A%%Z-a`XUE2JtAZZ96h~Aacu4xV z-e&G~(R1j|8;mC;Mq^^r#UuM3D6mlvUQVw`avx8H+*6?o?XO>dtGTw*A7c@GH#hip z_Eu6U2`zKWKafgszPht>rIjzKKdHLdSN~$h|In7MV~+YJ{Dm-C7=k*uB4SzCV?|FH zZCo`q&w&QCj)R$l*1}ZCd6puurP6BR=rspkpNOfRg}I$~{m5U+IGsNe`XK9yixBb4 zKq~odR3J_p7iSB5cu{u30*XMil&M^#3gouNjg`lx(WTI*{){HQnm%SdgP5b+ur)!W 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Vf9Ip!y~yFrj1#(@+Sh*f-vGYH&OrbG diff --git a/mag/caravan.mag b/mag/caravan.mag index 8493ede7..9402ac71 100644 --- a/mag/caravan.mag +++ b/mag/caravan.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1650895425 +timestamp 1651019166 << viali >> rect 658360 47209 658394 47243 << metal1 >> @@ -18486,11 +18486,11 @@ rect 575658 43120 575664 43132 rect 575716 43120 575722 43172 rect 223574 43052 223580 43104 rect 223632 43092 223638 43104 -rect 661034 43092 661040 43104 -rect 223632 43064 661040 43092 +rect 661454 43092 661460 43104 +rect 223632 43064 661460 43092 rect 223632 43052 223638 43064 -rect 661034 43052 661040 43064 -rect 661092 43052 661098 43104 +rect 661454 43052 661460 43064 +rect 661512 43052 661518 43104 rect 475470 42616 475476 42628 rect 474490 42588 475476 42616 rect 475470 42576 475476 42588 @@ -23772,7 +23772,7 @@ rect 365168 44072 365220 44124 rect 390192 43120 390244 43172 rect 575664 43120 575716 43172 rect 223580 43052 223632 43104 -rect 661040 43052 661092 43104 +rect 661460 43052 661512 43104 rect 475476 42576 475528 42628 rect 513288 41964 513340 42016 rect 518532 41964 518584 42016 @@ -44442,11 +44442,13 @@ rect 661040 47388 661092 47394 rect 661040 47330 661092 47336 rect 650000 46980 650052 46986 rect 650000 46922 650052 46928 +rect 661052 46912 661080 47330 +rect 661052 46884 661500 46912 rect 610348 45824 610400 45830 rect 610348 45766 610400 45772 -rect 661052 43110 661080 47330 -rect 661040 43104 661092 43110 -rect 661040 43046 661092 43052 +rect 661472 43110 661500 46884 +rect 661460 43104 661512 43110 +rect 661460 43046 661512 43052 rect 610256 41404 610308 41410 rect 610256 41346 610308 41352 rect 575756 41336 575808 41342 @@ -58907,7 +58909,7 @@ timestamp 1637698689 transform 1 0 -53810 0 1 -20 box 367960 10204 399802 14768 use caravan_power_routing caravan_power_routing_0 -timestamp 1638483672 +timestamp 1650915033 transform 1 0 0 0 1 0 box 0 0 717600 1037600 use caravan_signal_routing caravan_signal_routing_0 @@ -58923,111 +58925,111 @@ timestamp 1649951985 transform 1 0 149318 0 1 16066 box -262 -10162 35048 2764 use gpio_control_block gpio_control_bidir_1\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 121000 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_1\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 166200 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[0\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 289000 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[1\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 245800 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[2\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 202600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 523800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 568800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[2\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 614000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[3\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 659000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[4\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 704200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[5\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 884800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 211200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 256400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[2\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 301400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[3\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 346400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[4\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 391600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[5\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 479800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[0\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 805400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[1\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 762200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[2\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 719000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[3\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 675800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[4\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 632600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[5\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 589400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[6\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 546200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[7\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 418600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[8\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 375400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[9\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 332200 box 882 416 34000 13000 use gpio_defaults_block_1803 gpio_defaults_block_0\[0\] @@ -59163,7 +59165,7 @@ timestamp 1638875307 transform 1 0 628146 0 1 80944 box 0 0 15000 15000 use simple_por por -timestamp 1638031832 +timestamp 1650914729 transform 1 0 650146 0 -1 55282 box -52 -62 11344 8684 use xres_buf rstb_level diff --git a/mag/caravan_power_routing.mag b/mag/caravan_power_routing.mag index 865f1395..a68b3fdd 100644 --- a/mag/caravan_power_routing.mag +++ b/mag/caravan_power_routing.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1638483672 +timestamp 1650915033 << error_p >> rect 585752 994898 585758 994904 rect 590380 994898 590386 994904 @@ -375,8 +375,10 @@ rect 648166 46660 649608 47124 << metal2 >> rect 648104 47124 649670 47188 rect 648104 46660 648166 47124 -rect 649608 46660 649670 47124 -rect 648104 46590 649670 46660 +rect 649608 46738 649670 47124 +rect 649608 46660 650160 46738 +rect 648104 46598 650160 46660 +rect 648104 46590 649670 46598 << via2 >> rect 648166 46660 649608 47124 << metal3 >> @@ -452,8 +454,10 @@ rect 251300 46630 255702 46686 rect 251300 42856 251392 46630 rect 255638 42856 255702 46630 rect 648104 46660 648166 47124 -rect 649608 46660 649670 47124 -rect 648104 46590 649670 46660 +rect 649608 46844 649670 47124 +rect 649608 46660 650160 46844 +rect 648104 46598 650160 46660 +rect 648104 46590 649670 46598 rect 653462 45026 656910 45156 rect 251300 39426 255702 42856 rect 641954 43988 643694 44026 @@ -1659,54 +1663,26 @@ rect 0 1037400 717600 1037600 rect 0 200 200 1037400 rect 717400 200 717600 1037400 rect 0 0 717600 200 -use gpio_control_power_routing gpio_control_power_routing_1 -timestamp 1637447660 -transform 1 0 -10 0 1 43200 -box 6032 203748 55470 221470 use gpio_control_power_routing gpio_control_power_routing_0 timestamp 1637447660 transform 1 0 -10 0 1 0 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_13 -timestamp 1637595202 -transform -1 0 717846 0 1 -36400 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_14 -timestamp 1637595202 -transform -1 0 717846 0 1 -81600 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_11 -timestamp 1637595202 -transform -1 0 717846 0 1 53800 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_12 -timestamp 1637595202 -transform -1 0 717846 0 1 8600 -box 6032 203748 46226 221470 -use gpio_control_power_routing gpio_control_power_routing_4 +use gpio_control_power_routing gpio_control_power_routing_1 timestamp 1637447660 -transform 1 0 -10 0 1 172800 +transform 1 0 -10 0 1 43200 +box 6032 203748 55470 221470 +use gpio_control_power_routing gpio_control_power_routing_2 +timestamp 1637447660 +transform 1 0 -10 0 1 86400 box 6032 203748 55470 221470 use gpio_control_power_routing gpio_control_power_routing_3 timestamp 1637447660 transform 1 0 -10 0 1 129600 box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_2 +use gpio_control_power_routing gpio_control_power_routing_4 timestamp 1637447660 -transform 1 0 -10 0 1 86400 +transform 1 0 -10 0 1 172800 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_8 -timestamp 1637595202 -transform -1 0 717846 0 1 189000 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_9 -timestamp 1637595202 -transform -1 0 717846 0 1 143800 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_10 -timestamp 1637595202 -transform -1 0 717846 0 1 98800 -box 6032 203748 46226 221470 use gpio_control_power_routing gpio_control_power_routing_5 timestamp 1637447660 transform 1 0 -10 0 1 216000 @@ -1715,26 +1691,38 @@ use gpio_control_power_routing gpio_control_power_routing_6 timestamp 1637447660 transform 1 0 -10 0 1 343600 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_6 -timestamp 1637595202 -transform -1 0 717846 0 1 321200 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_7 -timestamp 1637595202 -transform -1 0 717846 0 1 277200 -box 6032 203748 46226 221470 -use gpio_control_power_routing gpio_control_power_routing_9 +use gpio_control_power_routing gpio_control_power_routing_7 timestamp 1637447660 -transform 1 0 -10 0 1 473200 +transform 1 0 -10 0 1 386800 box 6032 203748 55470 221470 use gpio_control_power_routing gpio_control_power_routing_8 timestamp 1637447660 transform 1 0 -10 0 1 430000 box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_7 +use gpio_control_power_routing gpio_control_power_routing_9 timestamp 1637447660 -transform 1 0 -10 0 1 386800 +transform 1 0 -10 0 1 473200 +box 6032 203748 55470 221470 +use gpio_control_power_routing gpio_control_power_routing_10 +timestamp 1637447660 +transform 1 0 -10 0 1 516400 +box 6032 203748 55470 221470 +use gpio_control_power_routing gpio_control_power_routing_11 +timestamp 1637447660 +transform 1 0 -10 0 1 559600 box 6032 203748 55470 221470 +use gpio_control_power_routing gpio_control_power_routing_12 +timestamp 1637447660 +transform 1 0 -10 0 1 602800 +box 6032 203748 55470 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_0 +timestamp 1637595202 +transform -1 0 717836 0 1 682200 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_2 +timestamp 1637595202 +transform -1 0 717846 0 1 501600 +box 6032 203748 46226 221470 use gpio_control_power_routing_right gpio_control_power_routing_right_3 timestamp 1637595202 transform -1 0 717846 0 1 456400 @@ -1747,25 +1735,41 @@ use gpio_control_power_routing_right gpio_control_power_routing_right_5 timestamp 1637595202 transform -1 0 717846 0 1 366200 box 6032 203748 46226 221470 -use gpio_control_power_routing gpio_control_power_routing_12 -timestamp 1637447660 -transform 1 0 -10 0 1 602800 -box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_10 -timestamp 1637447660 -transform 1 0 -10 0 1 516400 -box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_11 -timestamp 1637447660 -transform 1 0 -10 0 1 559600 -box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_2 +use gpio_control_power_routing_right gpio_control_power_routing_right_6 timestamp 1637595202 -transform -1 0 717846 0 1 501600 +transform -1 0 717846 0 1 321200 box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_0 +use gpio_control_power_routing_right gpio_control_power_routing_right_7 timestamp 1637595202 -transform -1 0 717836 0 1 682200 +transform -1 0 717846 0 1 277200 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_8 +timestamp 1637595202 +transform -1 0 717846 0 1 189000 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_9 +timestamp 1637595202 +transform -1 0 717846 0 1 143800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_10 +timestamp 1637595202 +transform -1 0 717846 0 1 98800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_11 +timestamp 1637595202 +transform -1 0 717846 0 1 53800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_12 +timestamp 1637595202 +transform -1 0 717846 0 1 8600 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_13 +timestamp 1637595202 +transform -1 0 717846 0 1 -36400 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_14 +timestamp 1637595202 +transform -1 0 717846 0 1 -81600 box 6032 203748 46226 221470 << labels >> flabel metal5 54316 219436 55324 219998 0 FreeSans 1600 0 0 0 vccd1_core diff --git a/mag/caravel.mag b/mag/caravel.mag index bf106176..d1da5007 100644 --- a/mag/caravel.mag +++ b/mag/caravel.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1650665087 +timestamp 1651019111 << metal1 >> rect 195330 1007088 195336 1007140 rect 195388 1007128 195394 1007140 @@ -22549,11 +22549,11 @@ rect 672074 49512 672080 49524 rect 672132 49512 672138 49564 rect 194042 46180 194048 46232 rect 194100 46220 194106 46232 -rect 661126 46220 661132 46232 -rect 194100 46192 661132 46220 +rect 661466 46220 661472 46232 +rect 194100 46192 661472 46220 rect 194100 46180 194106 46192 -rect 661126 46180 661132 46192 -rect 661184 46180 661190 46232 +rect 661466 46180 661472 46192 +rect 661524 46180 661530 46232 rect 473170 42476 473176 42528 rect 473228 42476 473234 42528 rect 415118 42340 415124 42392 @@ -28915,7 +28915,7 @@ rect 478788 49716 478840 49768 rect 664260 49512 664312 49564 rect 672080 49512 672132 49564 rect 194048 46180 194100 46232 -rect 661132 46180 661184 46232 +rect 661472 46180 661524 46232 rect 473176 42476 473228 42528 rect 415124 42340 415176 42392 << metal2 >> @@ -50036,11 +50036,7 @@ rect 612830 47696 612886 47705 rect 612830 47631 612886 47640 rect 661130 47560 661186 47569 rect 661130 47495 661186 47504 -rect 612738 46472 612794 46481 -rect 612738 46407 612794 46416 -rect 611450 46336 611506 46345 -rect 611450 46271 611506 46280 -rect 661144 46238 661172 47495 +rect 661144 46898 661172 47495 rect 662432 47433 662460 57190 rect 672092 49570 672120 474807 rect 672632 220244 672684 220250 @@ -53429,9 +53425,15 @@ rect 664258 48512 664314 48521 rect 664258 48447 664314 48456 rect 662418 47424 662474 47433 rect 662418 47359 662474 47368 -rect 661132 46232 661184 46238 +rect 661144 46870 661512 46898 +rect 612738 46472 612794 46481 +rect 612738 46407 612794 46416 +rect 611450 46336 611506 46345 +rect 611450 46271 611506 46280 +rect 661484 46238 661512 46870 +rect 661472 46232 661524 46238 rect 610162 46200 610218 46209 -rect 661132 46174 661184 46180 +rect 661472 46174 661524 46180 rect 610162 46135 610218 46144 rect 610070 45248 610126 45257 rect 610070 45183 610126 45192 @@ -55790,8 +55792,6 @@ rect 646134 66000 646190 66056 rect 646134 64368 646190 64424 rect 612830 47640 612886 47696 rect 661130 47504 661186 47560 -rect 612738 46416 612794 46472 -rect 611450 46280 611506 46336 rect 675758 961288 675814 961344 rect 675666 959112 675722 959168 rect 675482 957752 675538 957808 @@ -56729,6 +56729,8 @@ rect 675758 103128 675814 103184 rect 675758 101360 675814 101416 rect 664258 48456 664314 48512 rect 662418 47368 662474 47424 +rect 612738 46416 612794 46472 +rect 611450 46280 611506 46336 rect 610162 46144 610218 46200 rect 610070 45192 610126 45248 rect 609978 41384 610034 41440 @@ -73707,7 +73709,7 @@ timestamp 1637698310 transform 1 0 -52778 0 1 -5036 box 373080 14838 395618 19242 use caravel_power_routing caravel_power_routing_0 -timestamp 1638492834 +timestamp 1650914956 transform 1 0 0 0 1 0 box 0 0 717600 1037600 use caravel_clocking clocking @@ -73719,155 +73721,155 @@ timestamp 1649268499 transform 1 0 149554 0 1 16026 box -262 -10348 35048 2764 use gpio_control_block gpio_control_bidir_1\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 121000 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_1\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 166200 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[0\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 289000 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[1\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 245800 box 882 416 34000 13000 use gpio_control_block gpio_control_bidir_2\[2\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 202600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 523800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 568800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[2\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 614000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[3\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 659000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[4\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 704200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[5\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 749200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[6\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 927600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[7\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 549200 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[8\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 497800 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[9\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 420800 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1\[10\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 353400 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[0\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 211200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[1\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 256400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[2\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 301400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[3\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 346400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[4\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 391600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_1a\[5\] -timestamp 1650313688 +timestamp 1650900217 transform -1 0 710203 0 1 479800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[0\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 303000 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[1\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 251400 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[2\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 200000 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[3\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 148600 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[4\] -timestamp 1650313688 +timestamp 1650900217 transform 0 1 97200 -1 0 1030077 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[5\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 931200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[6\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 805400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[7\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 762200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[8\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 719000 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[9\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 675800 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[10\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 632600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[11\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 589400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[12\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 546200 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[13\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 418600 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[14\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 375400 box 882 416 34000 13000 use gpio_control_block gpio_control_in_2\[15\] -timestamp 1650313688 +timestamp 1650900217 transform 1 0 7631 0 1 332200 box 882 416 34000 13000 use gpio_defaults_block_1803 gpio_defaults_block_0\[0\] @@ -74047,7 +74049,7 @@ timestamp 1638875307 transform 1 0 628146 0 1 80944 box 0 0 15000 15000 use simple_por por -timestamp 1638031832 +timestamp 1650914729 transform 1 0 650146 0 -1 55282 box -52 -62 11344 8684 use xres_buf rstb_level diff --git a/mag/caravel_power_routing.mag b/mag/caravel_power_routing.mag index 914907c6..db0d12d2 100644 --- a/mag/caravel_power_routing.mag +++ b/mag/caravel_power_routing.mag @@ -1,7 +1,7 @@ magic tech sky130A magscale 1 2 -timestamp 1638492834 +timestamp 1650914956 << error_p >> rect 111554 1006757 112632 1006758 rect 111554 1006005 111555 1006757 @@ -929,8 +929,10 @@ rect 648166 46660 649608 47124 << metal2 >> rect 648104 47124 649670 47188 rect 648104 46660 648166 47124 -rect 649608 46660 649670 47124 -rect 648104 46590 649670 46660 +rect 649608 46738 649670 47124 +rect 649608 46660 650160 46738 +rect 648104 46598 650160 46660 +rect 648104 46590 649670 46598 << via2 >> rect 648166 46660 649608 47124 << metal3 >> @@ -1400,8 +1402,10 @@ rect 251300 46630 255702 46686 rect 251300 42856 251392 46630 rect 255638 42856 255702 46630 rect 648104 46660 648166 47124 -rect 649608 46660 649670 47124 -rect 648104 46590 649670 46660 +rect 649608 46844 649670 47124 +rect 649608 46660 650158 46844 +rect 648104 46598 650158 46660 +rect 648104 46590 649670 46598 rect 653462 45026 656910 45156 rect 251300 39426 255702 42856 rect 641954 43988 643694 44026 @@ -3258,18 +3262,6 @@ use gpio_control_power_routing gpio_control_power_routing_1 timestamp 1637447660 transform 1 0 -10 0 1 43200 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_14 -timestamp 1637595202 -transform -1 0 717846 0 1 -81600 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_13 -timestamp 1637595202 -transform -1 0 717846 0 1 -36400 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_12 -timestamp 1637595202 -transform -1 0 717846 0 1 8600 -box 6032 203748 46226 221470 use gpio_control_power_routing gpio_control_power_routing_2 timestamp 1637447660 transform 1 0 -10 0 1 86400 @@ -3282,30 +3274,10 @@ use gpio_control_power_routing gpio_control_power_routing_4 timestamp 1637447660 transform 1 0 -10 0 1 172800 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_11 -timestamp 1637595202 -transform -1 0 717846 0 1 53800 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_10 -timestamp 1637595202 -transform -1 0 717846 0 1 98800 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_9 -timestamp 1637595202 -transform -1 0 717846 0 1 143800 -box 6032 203748 46226 221470 use gpio_control_power_routing gpio_control_power_routing_5 timestamp 1637447660 transform 1 0 -10 0 1 216000 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_8 -timestamp 1637595202 -transform -1 0 717846 0 1 189000 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_7 -timestamp 1637595202 -transform -1 0 717846 0 1 277200 -box 6032 203748 46226 221470 use gpio_control_power_routing gpio_control_power_routing_6 timestamp 1637447660 transform 1 0 -10 0 1 343600 @@ -3318,50 +3290,86 @@ use gpio_control_power_routing gpio_control_power_routing_8 timestamp 1637447660 transform 1 0 -10 0 1 430000 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_6 -timestamp 1637595202 -transform -1 0 717846 0 1 321200 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_5 -timestamp 1637595202 -transform -1 0 717846 0 1 366200 -box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_4 -timestamp 1637595202 -transform -1 0 717846 0 1 411400 -box 6032 203748 46226 221470 use gpio_control_power_routing gpio_control_power_routing_9 timestamp 1637447660 transform 1 0 -10 0 1 473200 box 6032 203748 55470 221470 +use gpio_control_power_routing gpio_control_power_routing_10 +timestamp 1637447660 +transform 1 0 -10 0 1 516400 +box 6032 203748 55470 221470 use gpio_control_power_routing gpio_control_power_routing_11 timestamp 1637447660 transform 1 0 -10 0 1 559600 box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_10 +use gpio_control_power_routing gpio_control_power_routing_12 timestamp 1637447660 -transform 1 0 -10 0 1 516400 +transform 1 0 -10 0 1 602800 box 6032 203748 55470 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_3 +use gpio_control_power_routing gpio_control_power_routing_13 +timestamp 1637447660 +transform 1 0 -10 0 1 728600 +box 6032 203748 55470 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_0 timestamp 1637595202 -transform -1 0 717846 0 1 456400 +transform -1 0 717836 0 1 725000 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_1 +timestamp 1637595202 +transform -1 0 717846 0 1 546600 box 6032 203748 46226 221470 use gpio_control_power_routing_right gpio_control_power_routing_right_2 timestamp 1637595202 transform -1 0 717846 0 1 501600 box 6032 203748 46226 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_1 +use gpio_control_power_routing_right gpio_control_power_routing_right_3 timestamp 1637595202 -transform -1 0 717846 0 1 546600 +transform -1 0 717846 0 1 456400 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_4 +timestamp 1637595202 +transform -1 0 717846 0 1 411400 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_5 +timestamp 1637595202 +transform -1 0 717846 0 1 366200 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_6 +timestamp 1637595202 +transform -1 0 717846 0 1 321200 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_7 +timestamp 1637595202 +transform -1 0 717846 0 1 277200 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_8 +timestamp 1637595202 +transform -1 0 717846 0 1 189000 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_9 +timestamp 1637595202 +transform -1 0 717846 0 1 143800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_10 +timestamp 1637595202 +transform -1 0 717846 0 1 98800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_11 +timestamp 1637595202 +transform -1 0 717846 0 1 53800 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_12 +timestamp 1637595202 +transform -1 0 717846 0 1 8600 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_13 +timestamp 1637595202 +transform -1 0 717846 0 1 -36400 +box 6032 203748 46226 221470 +use gpio_control_power_routing_right gpio_control_power_routing_right_14 +timestamp 1637595202 +transform -1 0 717846 0 1 -81600 box 6032 203748 46226 221470 -use gpio_control_power_routing gpio_control_power_routing_12 -timestamp 1637447660 -transform 1 0 -10 0 1 602800 -box 6032 203748 55470 221470 -use gpio_control_power_routing gpio_control_power_routing_13 -timestamp 1637447660 -transform 1 0 -10 0 1 728600 -box 6032 203748 55470 221470 use gpio_control_power_routing_top gpio_control_power_routing_top_0 timestamp 1637524495 transform 0 1 -105400 -1 0 1037728 @@ -3370,14 +3378,14 @@ use gpio_control_power_routing_top gpio_control_power_routing_top_1 timestamp 1637524495 transform 0 1 -54000 -1 0 1037728 box 6032 203748 43870 221470 -use gpio_control_power_routing_top gpio_control_power_routing_top_3 -timestamp 1637524495 -transform 0 1 48800 -1 0 1037728 -box 6032 203748 43870 221470 use gpio_control_power_routing_top gpio_control_power_routing_top_2 timestamp 1637524495 transform 0 1 -2600 -1 0 1037728 box 6032 203748 43870 221470 +use gpio_control_power_routing_top gpio_control_power_routing_top_3 +timestamp 1637524495 +transform 0 1 48800 -1 0 1037728 +box 6032 203748 43870 221470 use gpio_control_power_routing_top gpio_control_power_routing_top_4 timestamp 1637524495 transform 0 1 100400 -1 0 1037728 @@ -3398,10 +3406,6 @@ use gpio_control_power_routing_top gpio_control_power_routing_top_8 timestamp 1637524495 transform 0 1 346600 -1 0 1037728 box 6032 203748 43870 221470 -use gpio_control_power_routing_right gpio_control_power_routing_right_0 -timestamp 1637595202 -transform -1 0 717836 0 1 725000 -box 6032 203748 46226 221470 << labels >> flabel metal5 54316 219436 55324 219998 0 FreeSans 1600 0 0 0 vccd1_core flabel metal5 52692 217826 53700 218388 0 FreeSans 1600 0 0 0 vssd1_core diff --git a/mag/simple_por.mag b/mag/simple_por.mag index eb94b19f..900ab6a2 100644 --- a/mag/simple_por.mag +++ b/mag/simple_por.mag @@ -1,9 +1,10 @@ magic tech sky130A magscale 1 2 -timestamp 1638031832 +timestamp 1650914729 << isosubstrate >> -rect -52 -62 11288 8450 +rect -52 7354 7222 8450 +rect -52 -62 11288 7354 << nwell >> rect 70 7344 6652 7795 rect 7401 6799 10893 7301 @@ -322,6 +323,7 @@ rect 25 99 133 748 rect 10805 99 10867 748 rect 25 11 10867 99 << via1 >> +rect 92 8568 11148 8640 rect 60 8201 169 8269 rect 169 8201 624 8269 rect 1026 8193 6936 8260 @@ -348,6 +350,10 @@ rect 8439 6684 8506 6878 rect 10507 6765 10672 6834 rect 10233 6187 10700 6260 << metal2 >> +rect -14 8640 11218 8684 +rect -14 8568 92 8640 +rect 11148 8568 11218 8640 +rect -14 8544 11218 8568 rect 985 8286 7132 8287 rect 38 8269 7132 8286 rect 38 8201 60 8269 @@ -417,6 +423,7 @@ rect 10221 6187 10233 6260 rect 10700 6187 10716 6260 rect 10221 6176 10716 6187 << via2 >> +rect 92 8568 11148 8640 rect 77 8201 624 8261 rect 624 8201 634 8261 rect 77 8104 634 8201 @@ -438,6 +445,14 @@ rect 10753 7671 10905 7674 rect 8618 7449 10649 7543 rect 10757 6765 10909 6834 << metal3 >> +rect -14 8674 11214 8684 +rect -14 8640 7260 8674 +rect 7724 8640 11214 8674 +rect -14 8568 92 8640 +rect 11148 8568 11214 8640 +rect -14 8554 7260 8568 +rect 7724 8554 11214 8568 +rect -14 8438 11214 8554 rect 38 8261 7126 8283 rect 38 8244 77 8261 rect 634 8244 886 8261 @@ -481,11 +496,14 @@ rect 6408 6600 6825 6623 rect 4111 6494 5299 6522 rect 4111 6251 4307 6494 << via3 >> +rect 7260 8640 7724 8674 +rect 7260 8568 7724 8640 +rect 7260 8554 7724 8568 rect 73 8104 77 8244 rect 77 8104 634 8244 rect 634 8104 886 8244 rect 886 8104 7073 8244 -rect 7318 8153 10802 8252 +rect 7928 8153 10802 8252 rect 73 8000 7073 8104 rect 7306 7449 8343 7543 rect 8343 7449 8618 7543 @@ -494,22 +512,27 @@ rect 4350 6849 5268 7277 rect 4350 6558 5268 6849 rect 6432 6623 6803 7036 << metal4 >> +rect 7248 8674 7736 8684 +rect 7248 8554 7260 8674 +rect 7724 8554 7736 8674 rect 38 8244 7126 8283 rect 38 8000 73 8244 rect 7073 8000 7126 8244 rect 38 7965 7126 8000 -rect 7241 8252 11180 8291 -rect 7241 8153 7318 8252 +rect 7248 7655 7736 8554 +rect 7918 8252 11180 8291 +rect 7918 8153 7928 8252 rect 10802 8153 11180 8252 -rect 7241 7962 11180 8153 +rect 7918 7962 11180 8153 rect 10843 7755 11178 7774 -rect 38 7543 10667 7655 -rect 38 7449 7306 7543 -rect 10649 7449 10667 7543 -rect 38 7277 10667 7449 +rect 38 7277 6984 7655 rect 38 7255 4350 7277 rect 3817 6558 4350 7255 -rect 5268 7255 10667 7277 +rect 5268 7255 6984 7277 +rect 7248 7543 10667 7655 +rect 7248 7449 7306 7543 +rect 10649 7449 10667 7543 +rect 7248 7255 10667 7449 rect 5268 6558 5299 7255 rect 10843 7074 10879 7755 rect 6386 7036 10879 7074 @@ -534,6 +557,18 @@ rect 4507 6135 5299 6494 rect 10851 6615 10879 7755 rect 11146 6615 11171 7755 rect 10851 6242 11171 6615 +use sky130_fd_pr__cap_mim_m3_1_WRT4AW sky130_fd_pr__cap_mim_m3_1_WRT4AW_0 primitives +timestamp 1606502073 +transform -1 0 7027 0 1 3151 +box -3136 -3100 3136 3100 +use sky130_fd_pr__cap_mim_m3_2_W5U4AW sky130_fd_pr__cap_mim_m3_2_W5U4AW_0 primitives +timestamp 1606502073 +transform 1 0 7970 0 1 3151 +box -3179 -3101 3201 3101 +use sky130_fd_pr__nfet_g5v0d10v5_PKVMTM sky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 primitives +timestamp 1625577137 +transform 1 0 2660 0 1 6770 +box -308 -458 308 458 use sky130_fd_pr__nfet_g5v0d10v5_TGFUGS sky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 primitives timestamp 1606063140 transform 1 0 1515 0 1 6769 @@ -542,74 +577,62 @@ use sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 p timestamp 1605994897 transform -1 0 371 0 1 6769 box -308 -458 308 458 -use sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 primitives -timestamp 1606063140 -transform 1 0 1657 0 1 7841 -box -1101 -497 1101 497 -use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 primitives +use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 primitives timestamp 1606063140 -transform 1 0 408 0 1 7841 +transform 1 0 3392 0 1 7841 box -338 -497 338 497 -use sky130_fd_pr__nfet_g5v0d10v5_PKVMTM sky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 primitives -timestamp 1625577137 -transform 1 0 2660 0 1 6770 -box -308 -458 308 458 -use sky130_fd_pr__pfet_g5v0d10v5_YUHPBG sky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 primitives +use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 timestamp 1606063140 -transform 1 0 2906 0 1 7841 +transform 1 0 3878 0 1 7841 box -338 -497 338 497 -use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 +use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 timestamp 1606063140 -transform 1 0 3392 0 1 7841 +transform 1 0 6644 0 1 7841 box -338 -497 338 497 -use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 +use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 timestamp 1606063140 -transform 1 0 3878 0 1 7841 +transform 1 0 408 0 1 7841 box -338 -497 338 497 use sky130_fd_pr__pfet_g5v0d10v5_YEUEBV sky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 primitives timestamp 1606063140 transform 1 0 5018 0 1 7841 box -992 -497 992 497 +use sky130_fd_pr__pfet_g5v0d10v5_YUHPBG sky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 primitives +timestamp 1606063140 +transform 1 0 2906 0 1 7841 +box -338 -497 338 497 use sky130_fd_pr__pfet_g5v0d10v5_YUHPXE sky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 primitives timestamp 1606063140 transform 1 0 6158 0 1 7841 box -338 -497 338 497 -use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 +use sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 primitives timestamp 1606063140 -transform 1 0 6644 0 1 7841 -box -338 -497 338 497 -use sky130_fd_sc_hvl__schmittbuf_1 sky130_fd_sc_hvl__schmittbuf_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1638025766 -transform 1 0 7467 0 1 6404 -box -66 -43 1122 897 -use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_1 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1638025766 -transform 1 0 7477 0 1 7438 -box -66 -43 1986 897 -use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_0 -timestamp 1638025766 +transform 1 0 1657 0 1 7841 +box -1101 -497 1101 497 +use sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 sky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 primitives +timestamp 1606074388 +transform 1 0 5446 0 1 3098 +box -5446 -3098 5446 3098 +use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag +timestamp 1646116156 transform 1 0 8523 0 1 6404 box -66 -43 1986 897 +use sky130_fd_sc_hvl__buf_8 sky130_fd_sc_hvl__buf_8_1 +timestamp 1646116156 +transform 1 0 7477 0 1 7438 +box -66 -43 1986 897 use sky130_fd_sc_hvl__fill_4 sky130_fd_sc_hvl__fill_4_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1638025766 +timestamp 1646116156 transform 1 0 10443 0 1 6404 box -66 -43 450 897 use sky130_fd_sc_hvl__inv_8 sky130_fd_sc_hvl__inv_8_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag -timestamp 1638025766 +timestamp 1646116156 transform 1 0 9397 0 1 7438 box -66 -43 1506 897 -use sky130_fd_pr__cap_mim_m3_1_WRT4AW sky130_fd_pr__cap_mim_m3_1_WRT4AW_0 primitives -timestamp 1606502073 -transform -1 0 7027 0 1 3151 -box -3136 -3100 3136 3100 -use sky130_fd_pr__cap_mim_m3_2_W5U4AW sky130_fd_pr__cap_mim_m3_2_W5U4AW_0 primitives -timestamp 1606502073 -transform 1 0 7970 0 1 3151 -box -3179 -3101 3201 3101 -use sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 sky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 primitives -timestamp 1606074388 -transform 1 0 5446 0 1 3098 -box -5446 -3098 5446 3098 +use sky130_fd_sc_hvl__schmittbuf_1 sky130_fd_sc_hvl__schmittbuf_1_0 $PDKPATH/libs.ref/sky130_fd_sc_hvl/mag +timestamp 1646116156 +transform 1 0 7467 0 1 6404 +box -66 -43 1122 897 << labels >> flabel metal4 s 38 7965 73 8283 0 FreeSans 320 0 0 0 vdd3v3 port 0 nsew power bidirectional @@ -626,8 +649,8 @@ port 6 nsew ground bidirectional flabel metal4 s 38 7255 232 7655 0 FreeSans 320 0 0 0 vss3v3 port 2 nsew ground bidirectional << properties >> -string LEFclass BLOCK string FIXED_BBOX 0 0 11344 8338 string GDS_FILE ../gds/simple_por.gds string GDS_START 0 +string LEFclass BLOCK << end >> diff --git a/xschem/run_simple_por_lvs.sh b/xschem/run_simple_por_lvs.sh new file mode 100755 index 00000000..fefec5fd --- /dev/null +++ b/xschem/run_simple_por_lvs.sh @@ -0,0 +1,46 @@ +#!/bin/bash +#--------------------------------------------------------------------------- +# +# Run LVS on the simple_por. +# +#--------------------------------------------------------------------------- +echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null +echo ${PDK:=sky130A} > /dev/null + +# Extract full layout netlist +cd ../mag +if [ ! -f simple_por.spice ]; then +magic -dnull -noconsole -rcfile $PDK_ROOT/$PDK/libs.tech/magic/$PDK.magicrc << EOF +drc off +crashbackups stop +load simple_por +extract do local +extract all +ext2spice lvs +ext2spice +EOF +rm -f *.ext +fi +cd ../xschem + +# Generate script for netgen +cat > netgen.tcl << EOF +# Load top level netlist +puts stdout "Reading layout netlist simple_por.spice" +set circuit1 [readnet spice ../mag/simple_por.spice] +puts stdout "Reading schematic netlist simple_por.spice" +set circuit2 [readnet spice simple_por.spice] +# Read additional subcircuits into the netlist of circuit2 +puts stdout "Reading standard cell netlists" +readnet spice $PDK_ROOT/$PDK/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice \$circuit2 + +# Run LVS +lvs "\$circuit1 simple_por" "\$circuit2 simple_por" $PDK_ROOT/$PDK/libs.tech/netgen/${PDK}_setup.tcl simple_por_comp.out +EOF + +export NETGEN_COLUMNS=60 +netgen -batch source netgen.tcl +rm netgen.tcl + +# mv simple_por_comp.out ../signoff/ +exit 0 diff --git a/xschem/simple_por.sch b/xschem/simple_por.sch index cf6e0c33..b81add44 100644 --- a/xschem/simple_por.sch +++ b/xschem/simple_por.sch @@ -24,9 +24,9 @@ no temperature compensation} 1950 -570 0 0 0.6 0.6 {} N 2500 -310 2500 -270 { lab=#net1} N 2500 -210 2500 -100 { lab=#net2} N 2300 -40 2300 20 { lab=#net3} -N 2300 80 2300 110 { lab=vss} -N 2360 110 2500 110 { lab=vss} -N 2500 80 2500 110 { lab=vss} +N 2300 80 2300 110 { lab=vss3v3} +N 2360 110 2500 110 { lab=vss3v3} +N 2500 80 2500 110 { lab=vss3v3} N 2400 50 2460 50 { lab=#net3} N 2360 -400 2500 -400 { lab=vdd3v3} N 2500 -400 2500 -370 { lab=vdd3v3} @@ -39,25 +39,25 @@ N 2540 -340 2570 -340 { lab=#net1} N 2500 -190 2570 -190 { lab=#net2} N 2570 -240 2570 -190 { lab=#net2} N 2540 -240 2570 -240 { lab=#net2} -N 2240 110 2360 110 { lab=vss} -N 2500 110 2630 110 { lab=vss} -N 2500 50 2630 50 { lab=vss} -N 2110 110 2240 110 { lab=vss} -N 1930 60 1930 110 { lab=vss} +N 2240 110 2360 110 { lab=vss3v3} +N 2500 110 2630 110 { lab=vss3v3} +N 2500 50 2630 50 { lab=vss3v3} +N 2110 110 2240 110 { lab=vss3v3} +N 1930 60 1930 110 { lab=vss3v3} N 1930 -160 1930 0 { lab=#net4} N 1930 -400 1930 -220 { lab=vdd3v3} N 2110 -400 2360 -400 { lab=vdd3v3} -N 1880 -190 1910 -190 { lab=vss} -N 1880 -190 1880 110 { lab=vss} -N 1880 110 1930 110 { lab=vss} -N 1880 30 1910 30 { lab=vss} +N 1880 -190 1910 -190 { lab=vss3v3} +N 1880 -190 1880 110 { lab=vss3v3} +N 1880 110 1930 110 { lab=vss3v3} +N 1880 30 1910 30 { lab=vss3v3} N 2300 -310 2300 -270 { lab=#net5} N 2300 -400 2300 -370 { lab=vdd3v3} N 2300 -140 2300 -100 { lab=#net3} N 2340 50 2400 50 { lab=#net3} N 2300 -210 2300 -140 { lab=#net3} -N 2100 80 2100 110 { lab=vss} -N 2100 110 2110 110 { lab=vss} +N 2100 80 2100 110 { lab=vss3v3} +N 2100 110 2110 110 { lab=vss3v3} N 2050 50 2060 50 { lab=#net4} N 2050 -70 2050 50 { lab=#net4} N 1930 -70 2050 -70 { lab=#net4} @@ -65,8 +65,8 @@ N 1930 -400 2110 -400 { lab=vdd3v3} N 2100 -400 2100 -370 { lab=vdd3v3} N 2100 -310 2100 -270 { lab=#net6} N 2100 -210 2100 20 { lab=#net7} -N 2100 50 2300 50 { lab=vss} -N 2200 50 2200 110 { lab=vss} +N 2100 50 2300 50 { lab=vss3v3} +N 2200 50 2200 110 { lab=vss3v3} N 2140 -240 2260 -240 { lab=#net7} N 2140 -340 2260 -340 { lab=#net6} N 2100 -290 2180 -290 { lab=#net6} @@ -75,7 +75,7 @@ N 2100 -180 2180 -180 { lab=#net7} N 2180 -240 2180 -180 { lab=#net7} N 1930 -240 2100 -240 { lab=vdd3v3} N 1930 -340 2100 -340 { lab=vdd3v3} -N 1930 110 2100 110 { lab=vss} +N 1930 110 2100 110 { lab=vss3v3} N 2300 -240 2500 -240 { lab=vdd3v3} N 2300 -340 2500 -340 { lab=vdd3v3} N 2400 -340 2400 -240 { lab=vdd3v3} @@ -89,17 +89,17 @@ N 2690 -240 2790 -240 { lab=vdd3v3} N 2790 -340 2790 -240 { lab=vdd3v3} N 2690 -310 2690 -270 { lab=#net8} N 2690 -210 2690 -150 { lab=#net9} -N 1830 30 1880 30 { lab=vss} -N 1810 60 1810 110 { lab=vss} -N 1810 110 1880 110 { lab=vss} -N 1810 -70 1810 0 { lab=vss} -N 1810 -70 1880 -70 { lab=vss} +N 1830 30 1880 30 { lab=vss3v3} +N 1810 60 1810 110 { lab=vss3v3} +N 1810 110 1880 110 { lab=vss3v3} +N 1810 -70 1810 0 { lab=vss3v3} +N 1810 -70 1880 -70 { lab=vss3v3} N 2690 -150 2690 -70 { lab=#net9} N 2820 -130 2820 -70 { lab=#net9} N 2690 -130 2820 -130 { lab=#net9} -N 2630 110 2820 110 { lab=vss} -N 2820 -10 2820 110 { lab=vss} -N 2690 -10 2690 110 { lab=vss} +N 2630 110 2820 110 { lab=vss3v3} +N 2820 -10 2820 110 { lab=vss3v3} +N 2690 -10 2690 110 { lab=vss3v3} N 2820 -130 2980 -130 { lab=#net9} N 3060 -130 3130 -130 { lab=#net10} N 3090 -130 3090 60 { lab=#net10} @@ -109,8 +109,8 @@ N 3210 -130 3300 -130 { lab=porb_h} N 3210 -40 3300 -40 { lab=porb_l} N 3210 60 3300 60 { lab=por_l} N 2790 -400 2840 -400 { lab=vdd3v3} -N 2820 110 2870 110 { lab=vss} -N 2630 50 2690 50 { lab=vss} +N 2820 110 2870 110 { lab=vss3v3} +N 2630 50 2690 50 { lab=vss3v3} N 2300 -100 2300 -40 { lab=#net3} N 2500 -100 2500 -30 { lab=#net2} N 2500 -30 2500 20 { lab=#net2} @@ -285,13 +285,14 @@ L=25 model=res_xhigh_po_0p69 spiceprefix=X mult=2} -C {sky130_stdcells/buf_8.sym} 3170 -130 0 0 {name=x2 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__ } -C {sky130_stdcells/buf_8.sym} 3170 -40 0 0 {name=x3 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } -C {sky130_stdcells/inv_8.sym} 3170 60 0 0 {name=x4 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } -C {sky130_stdcells/buf_1.sym} 3020 -130 0 0 {name=x5 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__schmitt } +C {sky130_stdcells/buf_8.sym} 3170 -130 0 0 {name=x2 VGND=vss3v3 VNB=vss3v3 VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/buf_8.sym} 3170 -40 0 0 {name=x3 VGND=vss1v8 VNB=vss1v8 VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/inv_8.sym} 3170 60 0 0 {name=x4 VGND=vss1v8 VNB=vss1v8 VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/buf_1.sym} 3020 -130 0 0 {name=x5 VGND=vss3v3 VNB=vss3v3 VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__schmitt } C {devices/iopin.sym} 2840 -400 0 0 {name=p1 lab=vdd3v3} -C {devices/iopin.sym} 2870 110 0 0 {name=p2 lab=vss} +C {devices/iopin.sym} 2870 110 0 0 {name=p2 lab=vss3v3} C {devices/opin.sym} 3300 -130 0 0 {name=p3 lab=porb_h} C {devices/opin.sym} 3300 -40 0 0 {name=p4 lab=porb_l} C {devices/opin.sym} 3300 60 0 0 {name=p5 lab=por_l} C {devices/iopin.sym} 2840 -330 0 0 {name=p6 lab=vdd1v8} +C {devices/iopin.sym} 2870 60 0 0 {name=p7 lab=vss1v8} diff --git a/xschem/simple_por.spice b/xschem/simple_por.spice index 2aa52652..820a383b 100644 --- a/xschem/simple_por.spice +++ b/xschem/simple_por.spice @@ -1,229 +1,53 @@ -*--------------------------------------------------------------------------- -* SPDX-FileCopyrightText: 2020 Efabless Corporation -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* https://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -* SPDX-License-Identifier: Apache-2.0 -*--------------------------------------------------------------------------- -* NGSPICE file created from simple_por.ext - technology: sky130A - -.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW VSUBS m4_n3179_n3100# c2_n3079_n3000# -X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u -.ends - -.subckt sky130_fd_sc_hvl__buf_8 A VGND VNB VPB VPWR X -X0 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X2 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X3 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X4 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X5 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X6 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X8 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X9 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X10 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X12 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X14 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X15 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X16 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X18 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X19 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X20 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X21 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -.ends - -.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ VSUBS a_n465_n200# a_n247_n200# a_n29_n200# -+ a_843_n200# w_n1101_n497# a_n843_n297# a_625_n200# a_683_n297# a_n625_n297# a_407_n200# -+ a_465_n297# a_n407_n297# a_247_n297# a_n901_n200# a_189_n200# a_29_n297# a_n189_n297# -+ a_n683_n200# -X0 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X2 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X4 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X5 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X6 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X7 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS VSUBS a_n80_n288# a_n574_n200# a_n356_n200# -+ a_n138_n200# a_n734_n288# a_574_n288# a_n516_n288# a_356_n288# a_80_n200# a_n298_n288# -+ a_138_n288# w_n962_n458# a_734_n200# a_516_n200# a_298_n200# a_n792_n200# -X0 a_516_n200# a_356_n288# a_298_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X1 a_n574_n200# a_n734_n288# a_n792_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X2 a_298_n200# a_138_n288# a_80_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X3 a_80_n200# a_n80_n288# a_n138_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X4 a_734_n200# a_574_n288# a_516_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X5 a_n356_n200# a_n516_n288# a_n574_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -X6 a_n138_n200# a_n298_n288# a_n356_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 VSUBS a_n2578_n2932# a_5142_2500# a_n1034_n2932# -+ a_n262_2500# a_1668_2500# a_n262_n2932# a_n3736_2500# a_3984_n2932# a_n2192_2500# -+ a_3984_2500# a_2440_n2932# a_2440_2500# a_4370_n2932# a_3598_2500# a_2054_2500# -+ a_n4508_n2932# a_510_2500# a_n4122_2500# a_n2964_n2932# a_124_2500# a_n4894_n2932# -+ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_4370_2500# a_n3350_n2932# a_n648_n2932# -+ a_n648_2500# a_n5280_n2932# a_n1420_2500# a_n2964_2500# a_n2578_2500# a_n1034_2500# -+ a_2826_n2932# a_n2192_n2932# a_2826_2500# a_4756_n2932# w_n5446_n3098# a_1282_2500# -+ a_3212_n2932# a_n4894_2500# a_n3350_2500# a_n4508_2500# a_5142_n2932# a_896_2500# -+ a_510_n2932# a_1668_n2932# a_n1806_n2932# a_4756_2500# a_n3736_n2932# a_3598_n2932# -+ a_3212_2500# a_2054_n2932# a_896_n2932# a_n5280_2500# a_n4122_n2932# a_n1806_2500# -X0 a_n3350_n2932# a_n3350_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X1 a_n4508_n2932# a_n4508_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X2 a_n2578_n2932# a_n2578_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X3 a_n1420_n2932# a_n1420_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X4 a_n4894_n2932# a_n4894_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X5 a_n3736_n2932# a_n3736_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X6 a_3598_n2932# a_3598_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X7 a_124_n2932# a_124_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X8 a_4756_n2932# a_4756_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X9 a_n2964_n2932# a_n2964_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X10 a_1668_n2932# a_1668_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X11 a_n1806_n2932# a_n1806_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X12 a_n648_n2932# a_n648_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X13 a_3984_n2932# a_3984_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X14 a_2826_n2932# a_2826_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X15 a_510_n2932# a_510_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X16 a_n4122_n2932# a_n4122_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X17 a_n2192_n2932# a_n2192_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X18 a_5142_n2932# a_5142_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X19 a_n1034_n2932# a_n1034_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X20 a_2054_n2932# a_2054_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X21 a_4370_n2932# a_4370_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X22 a_3212_n2932# a_3212_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X23 a_1282_n2932# a_1282_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X24 a_n262_n2932# a_n262_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X25 a_n5280_n2932# a_n5280_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X26 a_2440_n2932# a_2440_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -X27 a_896_n2932# a_896_2500# VSUBS sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u -.ends - -.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB VSUBS a_n138_n200# w_n338_n497# a_80_n200# -+ a_n80_n297# -X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VNB VPB VPWR X -X0 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u -X1 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u -X2 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u -X3 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u -X4 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u -X5 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X6 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u -X7 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X8 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u -X9 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u -.ends - -.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE VSUBS a_n138_n200# w_n338_n497# a_80_n200# -+ a_n80_n297# -X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM VSUBS a_n80_n288# a_n138_n200# a_80_n200# -+ w_n308_n458# -X0 a_80_n200# a_n80_n288# a_n138_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC VSUBS a_n80_n288# a_n138_n200# a_80_n200# -+ w_n308_n458# -X0 a_80_n200# a_n80_n288# a_n138_n200# VSUBS sky130_fd_pr__nfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW VSUBS m3_n3136_n3100# c1_n3036_n3000# -X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u -.ends - -.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV VSUBS w_n992_n497# a_n574_n200# a_n356_n200# -+ a_n138_n200# a_80_n200# a_n80_n297# a_734_n200# a_n734_n297# a_516_n200# a_574_n297# -+ a_n516_n297# a_356_n297# a_298_n200# a_n298_n297# a_138_n297# a_n792_n200# -X0 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X1 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X2 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X3 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X4 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X5 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -X6 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG VSUBS a_n138_n200# w_n338_n497# a_80_n200# -+ a_n80_n297# -X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 w=2e+06u l=800000u -.ends - -.subckt sky130_fd_sc_hvl__inv_8 A VGND VNB VPB VPWR Y -X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X1 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X2 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X3 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X4 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X5 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X6 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X7 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X8 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X9 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X10 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X11 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u -X13 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u -.ends - -.subckt simple_por vdd3v3 vdd1v8 vss porb_h por_l porb_l -Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_2_W5U4AW -Xsky130_fd_sc_hvl__buf_8_1 out vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 -Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 vss vdd3v3 m1_502_7653# vdd3v3 vdd3v3 vdd3v3 -+ m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# -+ m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ -Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 vss m1_721_6815# vss m1_721_6815# vss m1_721_6815# -+ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss -+ vss m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS -Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 vss li_2935_165# vss li_4479_165# li_4866_5813# -+ li_7182_5813# li_5251_165# li_1778_5813# li_9111_165# li_3322_5813# li_9498_5813# -+ li_7567_165# li_7954_5813# li_9883_165# li_8726_5813# li_7182_5813# li_619_165# -+ li_5638_5813# li_1006_5813# li_2163_165# li_5638_5813# li_619_165# li_6795_165# -+ li_5251_165# li_3707_165# li_9498_5813# li_2163_165# li_4479_165# li_4866_5813# -+ vss li_4094_5813# li_2550_5813# li_2550_5813# li_4094_5813# li_8339_165# li_2935_165# -+ li_7954_5813# li_9883_165# vss li_6410_5813# li_8339_165# vss li_1778_5813# li_1006_5813# -+ vss li_6410_5813# li_6023_165# li_6795_165# li_3707_165# vdd3v3 li_1391_165# li_9111_165# -+ li_8726_5813# li_7567_165# li_6023_165# vss li_1391_165# li_3322_5813# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 -Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 vss m1_2993_7658# vdd3v3 m1_721_6815# m1_185_6573# -+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB -Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vss vdd3v3 -+ vdd3v3 out sky130_fd_sc_hvl__schmittbuf_1 -Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 vss m1_2756_6573# vdd3v3 m1_4283_8081# m1_2756_6573# -+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB -Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 vss m1_6249_7690# vdd3v3 sky130_fd_sc_hvl__schmittbuf_1_0/A -+ m1_2756_6573# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB -Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 vss m1_185_6573# vdd3v3 m1_502_7653# m1_185_6573# -+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB -Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 vss vdd3v3 vdd3v3 m1_6249_7690# m1_4283_8081# -+ sky130_fd_pr__pfet_g5v0d10v5_YUHPXE -Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 vss m1_721_6815# vss m1_2756_6573# vss sky130_fd_pr__nfet_g5v0d10v5_PKVMTM -Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 vss li_2550_5813# vss m1_185_6573# vss sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC -Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 vss vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_1_WRT4AW -Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vss vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# -+ vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# -+ m1_4283_8081# m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV -Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 vss vdd3v3 vdd3v3 m1_2993_7658# m1_502_7653# -+ sky130_fd_pr__pfet_g5v0d10v5_YUHPBG -Xsky130_fd_sc_hvl__inv_8_0 out vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 -Xsky130_fd_sc_hvl__fill_4_0 vss vss vdd3v3 vdd3v3 sky130_fd_sc_hvl__fill_4 -Xsky130_fd_sc_hvl__buf_8_0 out vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 -.ends - +.subckt simple_por vdd3v3 vss3v3 porb_h porb_l por_l vdd1v8 vss1v8 +*.iopin vdd3v3 +*.iopin vss3v3 +*.opin porb_h +*.opin porb_l +*.opin por_l +*.iopin vdd1v8 +*.iopin vss1v8 +XC1 net9 vss3v3 sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1 +XC2 vss3v3 net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1 +XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net2 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1 +XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 net3 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1 +XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 net7 net4 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2 +x2 net10 vss3v3 vss3v3 vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 +x3 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 +x4 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 +x5 net9 vss3v3 vss3v3 vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1 +.ends +** flattened .save nodes +.end diff --git a/xschem/simple_por.sym b/xschem/simple_por.sym index e3875f5d..6804c660 100644 --- a/xschem/simple_por.sym +++ b/xschem/simple_por.sym @@ -16,13 +16,15 @@ L 4 130 0 150 0 {} L 4 130 30 150 30 {} L 7 -30 -80 -30 -60 {} L 7 30 -80 30 -60 {} -L 7 0 60 0 80 {} +L 7 -30 60 -30 80 {} +L 7 30 60 30 80 {} B 5 -32.5 -82.5 -27.5 -77.5 {name=vdd3v3 dir=inout } B 5 27.5 -82.5 32.5 -77.5 {name=vdd1v8 dir=inout } B 5 147.5 -32.5 152.5 -27.5 {name=porb_h dir=out } B 5 147.5 -2.5 152.5 2.5 {name=porb_l dir=out } B 5 147.5 27.5 152.5 32.5 {name=por_l dir=out } -B 5 -2.5 77.5 2.5 82.5 {name=vss dir=inout } +B 5 -32.5 77.5 -27.5 82.5 {name=vss3v3 dir=inout } +B 5 27.5 77.5 32.5 82.5 {name=vss1v8 dir=inout } T {@symname} -47.5 -6 0 0 0.3 0.3 {} T {@name} -25 18 0 0 0.2 0.2 {} T {vdd3v3} -15 -54 0 1 0.2 0.2 {} @@ -30,4 +32,5 @@ T {vdd1v8} 55 -54 0 1 0.2 0.2 {} T {porb_h} 125 -34 0 1 0.2 0.2 {} T {porb_l} 125 -4 0 1 0.2 0.2 {} T {por_l} 125 26 0 1 0.2 0.2 {} -T {vss} 5 46 0 1 0.2 0.2 {} +T {vss3v3} -25 46 0 1 0.2 0.2 {} +T {vss1v8} 35 46 0 1 0.2 0.2 {} diff --git a/xschem/simple_por_tb.sch b/xschem/simple_por_tb.sch index 69f7e909..e9a1be8c 100644 --- a/xschem/simple_por_tb.sch +++ b/xschem/simple_por_tb.sch @@ -27,6 +27,7 @@ N -490 -130 -280 -130 { lab=vdd1v8} N -490 60 -330 60 { lab=GND} N -330 60 -280 60 { lab=GND} N -330 -110 -210 -110 { lab=vdd3v3} +N -10 60 20 60 {} C {simple_por.sym} -10 -20 0 0 {name=x1} C {devices/gnd.sym} -100 60 0 0 {name=l1 lab=GND} C {devices/vsource.sym} -330 -30 0 0 {name=V1 value="PWL(0.0 0 100u 0 5m 3.3)"} diff --git a/xschem/simple_por_tb.spice b/xschem/simple_por_tb.spice index 18fc1dcf..ce9a6837 100644 --- a/xschem/simple_por_tb.spice +++ b/xschem/simple_por_tb.spice @@ -1,51 +1,79 @@ -*--------------------------------------------------------------------------- -* SPDX-FileCopyrightText: 2020 Efabless Corporation -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* https://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -* -* SPDX-License-Identifier: Apache-2.0 -*--------------------------------------------------------------------------- -* Simple POR circuit for Caravel -*------------------------------------------------------------------- -* -* Architecture: see simple_por.spice -* Response of this circuit by ngspice simulation is a ~15ms delay. -*------------------------------------------------------------------- +**.subckt simple_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l +*.opin vdd3v3 +*.opin vdd1v8 +*.opin porb_h +*.opin porb_l +*.opin por_l +x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND GND simple_por +V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3) +V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8) +**** begin user architecture code +.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt +.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice -.lib /home/tim/projects/efabless/tech/SW/sky130A/libs.tech/ngspice/sky130.lib.spice tt -.include /home/tim/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice -.include simple_por.spice - -*---------------------------- -* Testbench circuit -*---------------------------- -Vpwr vdda vss DC=0 PWL(0.0 0 100u 0 5m 3.3) -Vdig vccd vss DC=0 PWL(0.0 0 300u 0 5.3m 1.8) -Rgnd vss 0 0.01 -Cload1 porb_h vss 1E-12 -Cload2 por_l vss 1E-12 -Cload3 porb_l vss 1E-12 -Xpor vdda vccd vss porb_h por_l porb_l simple_por -*---------------------------- - -*---------------------------- -* Testbench control -*---------------------------- .control -tran 10u 20m -plot porb_h -plot por_l -plot porb_l +tran 1u 20m +plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l) .endc -.end +**** end user architecture code +**.ends +* expanding symbol: simple_por.sym # of pins=7 +* sym_path: /home/tim/gits/caravel/xschem/simple_por.sym +* sch_path: /home/tim/gits/caravel/xschem/simple_por.sch +.subckt simple_por vdd3v3 vdd1v8 porb_h porb_l por_l vss3v3 vss1v8 +*.iopin vdd3v3 +*.iopin vss3v3 +*.opin porb_h +*.opin porb_l +*.opin por_l +*.iopin vdd1v8 +*.iopin vss1v8 +XC1 net9 vss3v3 sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1 +XC2 vss3v3 net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1 +XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net2 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net4 vdd3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1 +XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 net3 net3 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 vss3v3 net4 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1 +XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 net7 net4 vss3v3 vss3v3 sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR3 vss3v3 vss3v3 vss3v3 sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2 +x2 net10 vss3v3 vss3v3 vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 +x3 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 +x4 net10 vss1v8 vss1v8 vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 +x5 net9 vss3v3 vss3v3 vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1 +.ends + +.GLOBAL GND +** flattened .save nodes +.end