Releases: efabless/caravel
Releases · efabless/caravel
caravel_v4_1
Caravel Release Version 4.1
mpw-7e
Update to Caravel Redesign to address antenna and max transition violations caught during review.
What's Changed
- add caravan signoff scripts support and results by @passant5 in #350
- Cleanup & documentation by @marwaneltoukhy in #355
- LVS logs for caravel-redesign-2 8c15b85 by @d-m-bailey in #357
- Caravel redesign 2 by @marwaneltoukhy in #356
Full Changelog: mpw-7d...mpw-7e
mpw-7d
Caravel Redesign release for MPW-7 and chipIgnite
What's Changed
- removed caravel-eco.v gl netlist and added the eco for porb_h_in in c… by @marwaneltoukhy in #348
- Update Makefile by @jeffdi in #349
Full Changelog: mpw-7c...mpw-7d
mpw-7c
Caravel Redesign release for MPW-7 and chipIgnite
What's Changed
- Corrected the documented solder bump diameter by @RTimothyEdwards in #133
- Error in User Area Base Address by @PriyankaDilip in #97
- Fix user pass thru by @RTimothyEdwards in #134
- Added reset values for pwr_ctrl_out in housekeeping by @RTimothyEdwards in #131
- Remove mgmt protect tristates by @RTimothyEdwards in #142
- Changed gpio_defaults_block_14 to gpio_defaults_block_25 by @RTimothyEdwards in #137
- fix typos in mgmt_protect.v by @M0stafaRady in #146
- Fix direct power connections by @RTimothyEdwards in #122
- Change CSB pin (GPIO 3) to be a weak pull-up input by @RTimothyEdwards in #135
- Remove SRAM read-only interface by @RTimothyEdwards in #151
- Added spare logic blocks for GPIO by @RTimothyEdwards in #153
- 152 add pass thru for clock and reset by @jeffdi in #154
- Effectively reverted the change to add spare logic blocks near each by @RTimothyEdwards in #157
- Caravel redesign by @mo-hosni in #158
- Chip io rework by @RTimothyEdwards in #161
- Update of all views of chip_io and chip_io_alt by @RTimothyEdwards in #162
- Caravel redesign by @mo-hosni in #163
- Fix typo at mprj_io by @M0stafaRady in #168
- gpio_control_block sparecell by @kareefardi in #166
- Updated the LEF of simple_por by @RTimothyEdwards in #170
- new environment for simulation automation with cocotb and vcs by @M0stafaRady in #139
- some rtl changes by @kareefardi in #165
- Cocotb dev to cocotb by @M0stafaRady in #172
- Caravel redesign by @mo-hosni in #173
- updated openlane and open_pdks commit by @marwaneltoukhy in #176
- Rehardened housekeeping to fix Antenna violations. by @mo-hosni in #178
- Fixes the .mag, LEF, DEF, and GDS views of chip_io and chip_io_alt by @RTimothyEdwards in #179
- Caravel redesign by @mo-hosni in #180
- Caravel update by @kareefardi in #181
- fix a typo in openlane makefile run tag variable and flag by @kareefardi in #182
- Rearrange spef and signoff directories and add separate directory for signoff sdc by @passant5 in #183
- ~ regenerate chip_io verilog netlist to fix missing power pins from constant blocks by @kareefardi in #190
-
- add multiconrner gpio_control_block spefs by @kareefardi in #194
- Antenna check addition to automation by @marwaneltoukhy in #205
- Digital pll reimplmentation and rtl update by @kareefardi in #197
- Caravel clocking reharden by @kareefardi in #214
- mgmt_protect final views by @marwaneltoukhy in #210
- Housekeeping final views by @marwaneltoukhy in #216
- Buff flash clkrst by @marwaneltoukhy in #217
- Add PT signoff directories for each block by @passant5 in #209
- Cocotb tests update by @M0stafaRady in #206
- reimplement caravel with latest blocks updates and a buffer macro by @kareefardi in #219
- reharden: caravel_clocking by @kareefardi in #220
- Housekeeping update by @mo-hosni in #230
- add full configuration files for housekeeping and mgmt_protect by @mo-hosni in #232
- Rewrote the layout for mgmt_protect_hv after correcting the pins, by @RTimothyEdwards in #233
-
- add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file by @kareefardi in #234
- Add top level buffers by @RTimothyEdwards in #213
- Update mgmt protect by @mo-hosni in #238
- added power connection to buffer top level rtl by @marwaneltoukhy in #239
- Cocotb script updates by @M0stafaRady in #240
- added power connection to buffer rtl by @marwaneltoukhy in #241
- ~ correct paths references in mag and maglef files from openlane by @kareefardi in #242
- update commits for pdk in Makefile by @jeffdi in #244
- add buff_flash_clkrst by @mo-hosni in #245
- Add bounding box to the GPIO signal buffering layout by @RTimothyEdwards in #246
- updated power routing for mgmt_core_wrapper and mgmt_protect by @mo-hosni in #249
- update signoff scripts by @passant5 in #250
- Re-implemented Macros generated libs by @passant5 in #251
- Mgmt protect without labeles by @mo-hosni in #253
- housekeeping without labels by @mo-hosni in #254
- caravel_power_routing updates by @kareefardi in #255
- removing the unpowered buff_flash_clkrst by @M0stafaRady in #257
- Cocotb tests and script updates by @M0stafaRady in #258
- Adjustments to the top level buffering cells by @RTimothyEdwards in #252
- More changes to the GPIO buffer cell by @RTimothyEdwards in #260
- Caravel redesign top level by @marwaneltoukhy in #261
- fix syntax error at gl/gpio_signal_buffering.v by @M0stafaRady in #262
- reharden: caravel by @kareefardi in #265
- mgmt_protect and hosuekeeping review reports by @mo-hosni in #267
- update caravel pdn by @kareefardi in #263
- Cocotb - add delay at the test mgmt_gpio_bidir test by @M0stafaRady in #266
- cocotb - fix debug test by @M0stafaRady in #269
- signoff scripts update by @passant5 in #270
- Add buffers to hk pins by @mo-hosni in #277
- reharden!: digital_pll by @kareefardi in #276
- Gpio control block fixes by @kareefardi in #275
- Caravel redesign fix housekeeping pdn by @mo-hosni in #288
- update signoff scripts to run LVS on SoC by @passant5 in #289
- reharden: caravel_clocking by @kareefardi in #291
- reharden: digital_pll by @kareefardi in #292
- Add a script that adds isolated substrate markers to layout. by @RTimothyEdwards in #280
- Create top-level LEF and pin generation script. by @RTimothyEdwards in #177
- Small change to the signal buffer layouts for LVS. by @RTimothyEdwards in #281
- misc: scripts to prevent & fix bad mag paths by @kareefardi in #290
- cocotb - ziping passed waves instead of removing them and fix bug at debug test by @M0stafaRady in #287
- Fixes to chip_io to fix LVS issues. Also added back top level by @RTimothyEdwards in #296
- cocotb - update script to store git info in the run git_show.log by @M0stafaRady in #298
- Caravel redesign new top by @marwaneltoukhy in #300
- Signoff results for
caravel
and sub-modules by @passant5 in #307 - consider test debug be use only dff in linkerscript since test overwrites dff2 by @M0stafaRady in #308
- add openlane configs for gpio_signal_buffering blocks by @kareefardi in #305
-
- add script for getting net length from a def file by @kareefardi in #306
- Repo directories cleanup b...
mpw-7-rc4
What's Changed
- Signoff results for
caravel
and sub-modules by @passant5 in #307 - consider test debug be use only dff in linkerscript since test overwrites dff2 by @M0stafaRady in #308
- add openlane configs for gpio_signal_buffering blocks by @kareefardi in #305
-
- add script for getting net length from a def file by @kareefardi in #306
- Repo directories cleanup by @passant5 in #309
- Caravel final views by @marwaneltoukhy in #310
- Cocotb - update cocotb scrip to fully support iverilog and update cocotb documentation by @M0stafaRady in #311
- Added extract unique to lvs-gds-cell target. by @d-m-bailey in #313
- Better error handling in gen_gpio_defaults.py script by @RTimothyEdwards in #314
- Fixed the LEF views of caravel and caravan, which determine the by @RTimothyEdwards in #297
- Fix errors in caravan top level RTL by @RTimothyEdwards in #317
- fix syntax error related to signal initialization place in caravan by @M0stafaRady in #319
Full Changelog: mpw-7-rc3...mpw-7-rc4
mpw-7-rc3
mpw-7-rc2
What's Changed
- reharden: caravel_clocking by @kareefardi in #220
- Housekeeping update by @mo-hosni in #230
- add full configuration files for housekeeping and mgmt_protect by @mo-hosni in #232
- Rewrote the layout for mgmt_protect_hv after correcting the pins, by @RTimothyEdwards in #233
-
- add caravel_clocking & digital_pl & gpio_control_block openlane runs config.tcl file by @kareefardi in #234
- Add top level buffers by @RTimothyEdwards in #213
- Update mgmt protect by @mo-hosni in #238
- added power connection to buffer top level rtl by @marwaneltoukhy in #239
- Cocotb script updates by @M0stafaRady in #240
- added power connection to buffer rtl by @marwaneltoukhy in #241
- ~ correct paths references in mag and maglef files from openlane by @kareefardi in #242
- update commits for pdk in Makefile by @jeffdi in #244
- add buff_flash_clkrst by @mo-hosni in #245
- Add bounding box to the GPIO signal buffering layout by @RTimothyEdwards in #246
- updated power routing for mgmt_core_wrapper and mgmt_protect by @mo-hosni in #249
- update signoff scripts by @passant5 in #250
- Re-implemented Macros generated libs by @passant5 in #251
- Mgmt protect without labeles by @mo-hosni in #253
- housekeeping without labels by @mo-hosni in #254
- caravel_power_routing updates by @kareefardi in #255
- removing the unpowered buff_flash_clkrst by @M0stafaRady in #257
- Cocotb tests and script updates by @M0stafaRady in #258
- Adjustments to the top level buffering cells by @RTimothyEdwards in #252
- More changes to the GPIO buffer cell by @RTimothyEdwards in #260
- Caravel redesign top level by @marwaneltoukhy in #261
- fix syntax error at gl/gpio_signal_buffering.v by @M0stafaRady in #262
- reharden: caravel by @kareefardi in #265
- mgmt_protect and hosuekeeping review reports by @mo-hosni in #267
- update caravel pdn by @kareefardi in #263
- Cocotb - add delay at the test mgmt_gpio_bidir test by @M0stafaRady in #266
- cocotb - fix debug test by @M0stafaRady in #269
- signoff scripts update by @passant5 in #270
- Add buffers to hk pins by @mo-hosni in #277
- reharden!: digital_pll by @kareefardi in #276
- Gpio control block fixes by @kareefardi in #275
- Caravel redesign fix housekeeping pdn by @mo-hosni in #288
- update signoff scripts to run LVS on SoC by @passant5 in #289
- reharden: caravel_clocking by @kareefardi in #291
- reharden: digital_pll by @kareefardi in #292
- Add a script that adds isolated substrate markers to layout. by @RTimothyEdwards in #280
- Create top-level LEF and pin generation script. by @RTimothyEdwards in #177
- Small change to the signal buffer layouts for LVS. by @RTimothyEdwards in #281
- misc: scripts to prevent & fix bad mag paths by @kareefardi in #290
- cocotb - ziping passed waves instead of removing them and fix bug at debug test by @M0stafaRady in #287
- Fixes to chip_io to fix LVS issues. Also added back top level by @RTimothyEdwards in #296
- cocotb - update script to store git info in the run git_show.log by @M0stafaRady in #298
- Caravel redesign new top by @marwaneltoukhy in #300
Full Changelog: mpw-7-rc1...mpw-7-rc2
mpw-7-rc1
First release candidate for Caravel redesign (MPW-7).
What's Changed
- Corrected the documented solder bump diameter by @RTimothyEdwards in #133
- Error in User Area Base Address by @PriyankaDilip in #97
- Fix user pass thru by @RTimothyEdwards in #134
- Added reset values for pwr_ctrl_out in housekeeping by @RTimothyEdwards in #131
- Remove mgmt protect tristates by @RTimothyEdwards in #142
- Changed gpio_defaults_block_14 to gpio_defaults_block_25 by @RTimothyEdwards in #137
- fix typos in mgmt_protect.v by @M0stafaRady in #146
- Fix direct power connections by @RTimothyEdwards in #122
- Change CSB pin (GPIO 3) to be a weak pull-up input by @RTimothyEdwards in #135
- Remove SRAM read-only interface by @RTimothyEdwards in #151
- Added spare logic blocks for GPIO by @RTimothyEdwards in #153
- 152 add pass thru for clock and reset by @jeffdi in #154
- Effectively reverted the change to add spare logic blocks near each by @RTimothyEdwards in #157
- Caravel redesign by @mo-hosni in #158
- Chip io rework by @RTimothyEdwards in #161
- Update of all views of chip_io and chip_io_alt by @RTimothyEdwards in #162
- Caravel redesign by @mo-hosni in #163
- Fix typo at mprj_io by @M0stafaRady in #168
- gpio_control_block sparecell by @kareefardi in #166
- Updated the LEF of simple_por by @RTimothyEdwards in #170
- new environment for simulation automation with cocotb and vcs by @M0stafaRady in #139
- some rtl changes by @kareefardi in #165
- Cocotb dev to cocotb by @M0stafaRady in #172
- Caravel redesign by @mo-hosni in #173
- updated openlane and open_pdks commit by @marwaneltoukhy in #176
- Rehardened housekeeping to fix Antenna violations. by @mo-hosni in #178
- Fixes the .mag, LEF, DEF, and GDS views of chip_io and chip_io_alt by @RTimothyEdwards in #179
- Caravel redesign by @mo-hosni in #180
- Caravel update by @kareefardi in #181
- fix a typo in openlane makefile run tag variable and flag by @kareefardi in #182
- Rearrange spef and signoff directories and add separate directory for signoff sdc by @passant5 in #183
- ~ regenerate chip_io verilog netlist to fix missing power pins from constant blocks by @kareefardi in #190
-
- add multiconrner gpio_control_block spefs by @kareefardi in #194
- Antenna check addition to automation by @marwaneltoukhy in #205
- Digital pll reimplmentation and rtl update by @kareefardi in #197
- Caravel clocking reharden by @kareefardi in #214
- mgmt_protect final views by @marwaneltoukhy in #210
- Housekeeping final views by @marwaneltoukhy in #216
- Buff flash clkrst by @marwaneltoukhy in #217
- Add PT signoff directories for each block by @passant5 in #209
- Cocotb tests update by @M0stafaRady in #206
- reimplement caravel with latest blocks updates and a buffer macro by @kareefardi in #219
New Contributors
- @PriyankaDilip made their first contribution in #97
- @M0stafaRady made their first contribution in #146
- @mo-hosni made their first contribution in #158
- @passant5 made their first contribution in #183
Full Changelog: mpw-7b...mpw-7-rc1
mpw-7b
mpw-7a
Release for MPW-7 shuttle.
What's Changed
- Caravel/Caravan gpio_defaults_block fix by @marwaneltoukhy in #94
- Another correction the gen_gpio_defaults.py script by @RTimothyEdwards in #95
- Modified the set_user_id.py script so that mode "-report" returns a valid value. by @RTimothyEdwards in #93
- Fix the simple_por to (logically) isolate the 1.8V and 3.3V grounds. by @RTimothyEdwards in #90
- add links to litex core by @mattvenn in #96
New Contributors
Full Changelog: mpw-6c...mpw-7a