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soc/interconnect/stream: Add optional CSR to Multiplexer/Demultiplexe… ci #3272: Commit a350d2e pushed by enjoy-digital
September 13, 2024 17:33 25m 11s master
master
September 13, 2024 17:33 25m 11s
build/xilinx/vivado: Fix typo. ci #3271: Commit 2a19a61 pushed by enjoy-digital
September 13, 2024 08:39 24m 39s master
master
September 13, 2024 08:39 24m 39s
Merge pull request #2069 from VOGL-electronic/fix-sim-ethernet ci #3270: Commit 9955080 pushed by enjoy-digital
September 13, 2024 06:36 28m 9s master
master
September 13, 2024 06:36 28m 9s
build/xilinx/vivado: Rename opt_directive to vivado_opt_directive for… ci #3269: Commit dc8c1bd pushed by enjoy-digital
September 12, 2024 16:04 25m 31s master
master
September 12, 2024 16:04 25m 31s
integration/soc/add_etherbone: Allow 64-bit support now that validated. ci #3268: Commit 203c981 pushed by enjoy-digital
September 12, 2024 11:39 25m 43s master
master
September 12, 2024 11:39 25m 43s
feature: Support renaming default uart to uart0. ci #3267: Pull request #1641 synchronize by jorislee
September 12, 2024 09:04 25m 33s jorislee:master
jorislee:master
September 12, 2024 09:04 25m 33s
BIOS: Add BOOTP support ci #3266: Pull request #2070 opened by m-byte
September 12, 2024 08:13 26m 29s VOGL-electronic:bios_bootp
VOGL-electronic:bios_bootp
September 12, 2024 08:13 26m 29s
sim: add HW_PREAMBLE_CRC for ethernet ci #3265: Pull request #2069 opened by m-byte
September 12, 2024 08:09 25m 13s VOGL-electronic:fix-sim-ethernet
VOGL-electronic:fix-sim-ethernet
September 12, 2024 08:09 25m 13s
build: io: make oe2 of DDRTristate optional ci #3264: Pull request #2068 opened by maass-hamburg
September 12, 2024 07:51 25m 39s VOGL-electronic:ddrtristate_oe2_optional
VOGL-electronic:ddrtristate_oe2_optional
September 12, 2024 07:51 25m 39s
Merge pull request #2066 from VOGL-electronic/soc.py_ethernet_mac ci #3263: Commit b41a526 pushed by enjoy-digital
September 11, 2024 09:54 25m 50s master
master
September 11, 2024 09:54 25m 50s
Merge pull request #2065 from VOGL-electronic/bios_little_warning_fix ci #3262: Commit 11c7b69 pushed by enjoy-digital
September 11, 2024 09:53 25m 1s master
master
September 11, 2024 09:53 25m 1s
soc.py: add_ethernet: add mac addr constant ci #3261: Pull request #2066 opened by maass-hamburg
September 11, 2024 09:22 24m 36s VOGL-electronic:soc.py_ethernet_mac
VOGL-electronic:soc.py_ethernet_mac
September 11, 2024 09:22 24m 36s
bios: boot.c: fix warnings ci #3260: Pull request #2065 opened by maass-hamburg
September 11, 2024 09:17 25m 51s VOGL-electronic:bios_little_warning_fix
VOGL-electronic:bios_little_warning_fix
September 11, 2024 09:17 25m 51s
Merge pull request #2060 from Dolu1990/efinix-rework ci #3259: Commit dc8b74c pushed by trabucayre
September 10, 2024 16:40 26m 2s master
master
September 10, 2024 16:40 26m 2s
build/efinix: add a few IO primitives, IO constraints, sdc rework ci #3258: Pull request #2060 synchronize by trabucayre
September 10, 2024 16:07 26m 39s Dolu1990:efinix-rework
Dolu1990:efinix-rework
September 10, 2024 16:07 26m 39s
Efinix rework primitives ci #3257: Pull request #2063 synchronize by trabucayre
September 10, 2024 14:34 24m 57s trabucayre:efinix_rework_primitives
trabucayre:efinix_rework_primitives
September 10, 2024 14:34 24m 57s
Efinix rework primitives ci #3256: Pull request #2063 synchronize by trabucayre
September 10, 2024 13:44 24m 48s trabucayre:efinix_rework_primitives
trabucayre:efinix_rework_primitives
September 10, 2024 13:44 24m 48s
Efinix rework primitives ci #3255: Pull request #2063 opened by trabucayre
September 10, 2024 10:10 26m 5s trabucayre:efinix_rework_primitives
trabucayre:efinix_rework_primitives
September 10, 2024 10:10 26m 5s
soc/interconnect/wishbone: Add Bypass mode on Cache when cachesize ==… ci #3254: Commit 458e005 pushed by enjoy-digital
September 9, 2024 16:24 25m 44s master
master
September 9, 2024 16:24 25m 44s
Merge pull request #2059 from Dolu1990/vexii-clk-video ci #3253: Commit e06045c pushed by enjoy-digital
September 9, 2024 12:12 26m 25s master
master
September 9, 2024 12:12 26m 25s
soc/cores/vexiiriscv: update clocks + add video framebuffer support ci #3252: Pull request #2059 synchronize by Dolu1990
September 6, 2024 14:07 25m 10s Dolu1990:vexii-clk-video
Dolu1990:vexii-clk-video
September 6, 2024 14:07 25m 10s
Merge pull request #2058 from VOGL-electronic/bios_add_spiram ci #3251: Commit a1a3e84 pushed by enjoy-digital
September 6, 2024 06:32 26m 26s master
master
September 6, 2024 06:32 26m 26s
bios: add spiram ci #3250: Pull request #2058 synchronize by maass-hamburg
September 5, 2024 14:31 24m 49s VOGL-electronic:bios_add_spiram
VOGL-electronic:bios_add_spiram
September 5, 2024 14:31 24m 49s
build/efinix: add a few IO primitives, IO constraints, sdc rework ci #3249: Pull request #2060 synchronize by Dolu1990
September 5, 2024 14:12 25m 2s Dolu1990:efinix-rework
Dolu1990:efinix-rework
September 5, 2024 14:12 25m 2s
bios: add spiram ci #3248: Pull request #2058 synchronize by maass-hamburg
September 5, 2024 14:01 25m 16s VOGL-electronic:bios_add_spiram
VOGL-electronic:bios_add_spiram
September 5, 2024 14:01 25m 16s