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I keep having the error message,can't read "io_pin_sites": no such variable, while executing 030-iob18 fuzzer.
So, I looked into generate.tcl in 030-iob18 directory.
And I opened my Vivado 2017.2 and tested make_io_pin_sites proc after "link_design -part xc7a15t" command.
As a result, it seems like there are no site and pad with IOB18* site type, skipping dict append io_pin_sites $site $pad.
That's why I constantly have the error.
Does this 030-iob18 fuzzer depend on target FPGA part?
proc make_io_pin_sites {} {
# get all possible IOB pins
foreach pad [get_package_pins -filter "IS_GENERAL_PURPOSE == 1"] {
set site [get_sites -of_objects $pad]
if {[llength $site] == 0} {
continue
}
if [string match IOB18* [get_property SITE_TYPE $site]] {
dict append io_pin_sites $site $pad
}
}
return $io_pin_sites
}
The text was updated successfully, but these errors were encountered:
I keep having the error message,can't read "io_pin_sites": no such variable, while executing 030-iob18 fuzzer.
So, I looked into generate.tcl in 030-iob18 directory.
And I opened my Vivado 2017.2 and tested make_io_pin_sites proc after "link_design -part xc7a15t" command.
As a result, it seems like there are no site and pad with IOB18* site type, skipping
dict append io_pin_sites $site $pad
.That's why I constantly have the error.
Does this 030-iob18 fuzzer depend on target FPGA part?
The text was updated successfully, but these errors were encountered: