From 4a92c27f9d29d065156647f9bcc44a8418c98efa Mon Sep 17 00:00:00 2001 From: Sergei Barannikov Date: Thu, 26 Dec 2024 17:45:29 +0300 Subject: [PATCH] [TableGen][GISel] Remove check for LLT when emitting renderers (#121144) Types used in the destination DAG of a pattern should not matter for GlobalISel. All necessary checks are emitted in the form of matchers when traversing the source DAG. In particular, the check prevented importing patterns containing iPTR in the middle of the destination DAG. This reduces the number of skipped patterns on Mips and RISCV: ``` Mips 1270 -> 1212 (-58) RISCV 42165 -> 42088 (-77) ``` Most of these patterns are for atomic operations. --- .../GlobalISelEmitter/OverloadedPtr.td | 26 ++++++++++++++++--- llvm/utils/TableGen/GlobalISelEmitter.cpp | 9 ------- 2 files changed, 22 insertions(+), 13 deletions(-) diff --git a/llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td b/llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td index c70211d66522..31accba8b184 100644 --- a/llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td +++ b/llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td @@ -4,10 +4,32 @@ include "llvm/Target/Target.td" include "GlobalISelEmitterCommon.td" +def GPR : RegisterClass<"MyTarget", [i32, i64], 32, (add R0)>; + let TargetPrefix = "mytarget" in { def int_mytarget_anyptr : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>; } +// Check that iPTR in the destination DAG doesn't prevent the pattern from being imported. + +// CHECK: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32, +// CHECK-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0, +// CHECK-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic, +// CHECK-NEXT: GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID), +// CHECK-NEXT: // MIs[0] src1 +// CHECK-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0, +// CHECK-NEXT: GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPRRegClassID), +// CHECK-NEXT: // (ld:{ *:[i32] } GPR:{ *:[iPTR] }:$src1)<><> => (ANYLOAD:{ *:[i32] } GPR:{ *:[iPTR] }:$src1) +// CHECK-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::ANYLOAD), +// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands, +// CHECK-NEXT: // GIR_Coverage, 0, +// CHECK-NEXT: GIR_Done, + +let hasSideEffects = 1 in { + def ANYLOAD : I<(outs GPR32:$dst), (ins GPR:$src1), + [(set GPR32:$dst, (load GPR:$src1))]>; +} + // Ensure that llvm_anyptr_ty on an intrinsic results in a // GIM_CheckPointerToAny rather than a GIM_CheckType. // @@ -20,10 +42,6 @@ let TargetPrefix = "mytarget" in { // CHECK-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_frag_anyptr), // CHECK-NEXT: // (intrinsic_w_chain:{ *:[i32] } {{[0-9]+}}:{ *:[iPTR] }, GPR32:{ *:[i32] }:$src)<> => (ANYLOAD:{ *:[i32] } GPR32:{ *:[i32] }:$src) // CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::ANYLOAD), -let hasSideEffects = 1 in { - def ANYLOAD : I<(outs GPR32:$dst), (ins GPR32:$src1), - [(set GPR32:$dst, (load GPR32:$src1))]>; -} def frag_anyptr : PatFrag<(ops node:$src), (int_mytarget_anyptr node:$src), diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp index 0b910096b052..f0fb11625883 100644 --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -1246,15 +1246,6 @@ Error GlobalISelEmitter::importNamedNodeRenderer( if (N.getNumResults() != 1) return failedImport("node does not have one result " + to_string(N)); - std::optional OpTyOrNone; - ArrayRef ChildTypes = N.getExtTypes(); - if (ChildTypes.front().isMachineValueType()) - OpTyOrNone = MVTToLLT(ChildTypes.front().getMachineValueType().SimpleTy); - - // TODO: Remove this check. Types in the destination DAG should not matter. - if (!OpTyOrNone) - return failedImport("node has unsupported type " + to_string(N)); - if (R->isSubClassOf("ComplexPattern")) { auto I = ComplexPatternEquivs.find(R); if (I == ComplexPatternEquivs.end())