Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

PadOp sometimes does not compose #354

Open
nicolasvasilache opened this issue Mar 10, 2022 · 2 comments
Open

PadOp sometimes does not compose #354

nicolasvasilache opened this issue Mar 10, 2022 · 2 comments
Assignees

Comments

@nicolasvasilache
Copy link
Contributor

The following IR fails to apply padding with the command:
./build/bin/mlir-proto-opt -linalg-interp-transforms /tmp/aaa.mlir -debug-only=transform-interpreter

module {
  func @conv_1d_nwc_wcf_main(%arg0: tensor<1x81x32xf32> {linalg.buffer_layout = affine_map<(d0, d1, d2) -> (d0, d1, d2)>, linalg.inplaceable = false}, %arg1: tensor<3x32x64xf32> {linalg.buffer_layout = affine_map<(d0, d1, d2) -> (d0, d1, d2)>, linalg.inplaceable = false}, %arg2: tensor<1x40x64xf32> {linalg.buffer_layout = affine_map<(d0, d1, d2) -> (d0, d1, d2)>, linalg.inplaceable = true}) -> tensor<1x40x64xf32> attributes {passthrough = ["noinline", ["target-cpu", "skylake-avx512"], ["prefer-vector-width", "512"]]} {
    %0 = linalg.conv_1d_nwc_wcf {dilations = dense<1> : tensor<1xi64>, strides = dense<2> : tensor<1xi64>} ins(%arg0, %arg1 : tensor<1x81x32xf32>, tensor<3x32x64xf32>) outs(%arg2 : tensor<1x40x64xf32>) -> tensor<1x40x64xf32>
    return %0 : tensor<1x40x64xf32>
  }
  linalg_transform.sequence {
    %0 = match @match_linalg_conv_1d_nwc_wcf_in_conv_1d_nwc_wcf_main
    %1 = tile %0 {interchange = [], peel = [], scalarize_dyn_dims = false, sizes = [1, 32, 128, 3, 32]}
    %2 = match @match_linalg_conv_1d_nwc_wcf_in_conv_1d_nwc_wcf_main
    %3 = tile %2 {interchange = [], peel = [0, 1, 2, 3, 4], scalarize_dyn_dims = false, sizes = [1, 8, 32, 1, 8]}
    %4 = match @match_linalg_conv_1d_nwc_wcf_in_conv_1d_nwc_wcf_main
    %5 = pad %4 {hoist_paddings = [3, 0, 0], pack_paddings = [1, 1, 0], transpose_paddings = []}
    // vectorize {vectorize_padding = true}
    // bufferize
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2, 3], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2, 3, 4], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2, 3, 4, 5], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2, 3, 4, 5, 6], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_vectors {contraction_lowering = "outerproduct", multireduction_lowering = "innerparallel", split_transfers = "linalg-copy", stages = [1, 2, 3, 4, 5, 6, 7], transpose_avx2_lowering = false, transpose_lowering = "eltwise", unroll_vector_transfers = true}
    // lower_to_llvm {enable_amx = false, enable_arm_neon = false, enable_arm_sve = false, enable_async = false, enable_index_optimizations = false, enable_x86vector = false, reassociate_fp_reductions = false}
  }
  pdl.pattern @match_linalg_conv_1d_nwc_wcf_in_conv_1d_nwc_wcf_main : benefit(1) {
    %0 = operands
    %1 = types
    %2 = operation "linalg.conv_1d_nwc_wcf"(%0 : !pdl.range<value>)  -> (%1 : !pdl.range<type>)
    apply_native_constraint "nestedInFunc" [@conv_1d_nwc_wcf_main](%2 : !pdl.operation)
    rewrite %2 with "linalg_transform.apply"
  }
}

This surfaced when trying to fix some of the older DoubleTile and TripleTile post padding.

The command that triggered this error is: (source benchmarks/conv.sh; conv_1d_repro)

@gysit
Copy link
Contributor

gysit commented Mar 10, 2022

in this particular case the failure may be explainable since peeling and padding may not work together. further investigation needed!

@nicolasvasilache
Copy link
Contributor Author

Ok I ported all other cases and this was the only occurrence.
Upon digging deeper, it seems we had a Tile that did both peel and pad but one of them was ignored, I fixed that by dropping the peeling.

Not closing the issue as it provides an interesting repro for more lenient transformations, but this is not a blocker either.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants