Bash scripts for EBMC\SymbiYosys\Verilog2SMV can't extract names of several Verilog modules

[ssmolov]

Bash scripts for side tools (EBMC, SymbiYosys, Verilog2SMV) running unable to extract names of several Verilog modules:

/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PI_BUS/single_master/master2.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PI_BUS/single_master/bus.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PI_BUS/multi_master/master2.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PI_BUS/multi_master/bus.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PPC60X_bus/src/cpu.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PPC60X_bus/src/arbiter.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/texas97/PPC60X_bus/src/mem.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/verilog2smv/VCEGAR/pi_bus/pi_bus.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/verilog2smv/VCEGAR/zaher/zdlx_impl.v_for_pred.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/verilog2smv/VIS/Miim/vMiim_p2.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/verilog2smv/VIS/Miim/vMiim_p1.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/vcegar/miim/vMiim.v
/home/ssedai/projects/retrascope-mc-benchmark/src/main/bash/../benchmarks/vcegar/pi_bus/main_1.v

For these modules their top level names are empty. Note, that all the scripts have a precondition: top level name is it's first declared module name.

The problem is in the following code:

top_name=$(echo "${line}" | sed -n 's/^module \([a-zA-Z0-9_]*\)[ |(||;].*$/\1/p')