diff --git a/litex_boards/platforms/sipeed_tang_nano_4k.py b/litex_boards/platforms/sipeed_tang_nano_4k.py
index dfe8c12ba..df781084c 100644
--- a/litex_boards/platforms/sipeed_tang_nano_4k.py
+++ b/litex_boards/platforms/sipeed_tang_nano_4k.py
@@ -88,7 +88,7 @@ class Platform(GowinPlatform):
 
     def __init__(self, toolchain="gowin"):
         # Educational GoWin IDE v. 1.9.8.03
-        GowinPlatform.__init__(self, "GW1NSR-LV4CQN48PC6/I5", _io, _connectors, toolchain=toolchain, devicename="GW1NS-4")
+        GowinPlatform.__init__(self, "GW1NSR-LV4CQN48PC6/I5", _io, _connectors, toolchain=toolchain, devicename="GW1NSR-4C")
         # Licensed GoWin IDE v. 1.9.7.06 Beta
         # GowinPlatform.__init__(self, "GW1NSR-LV4CQN48PC7/I6", _io, _connectors, toolchain=toolchain, devicename="GW1NSR-4C")
 
diff --git a/litex_boards/platforms/sipeed_tang_nano_9k.py b/litex_boards/platforms/sipeed_tang_nano_9k.py
index 52ca4a201..eefc0f12f 100644
--- a/litex_boards/platforms/sipeed_tang_nano_9k.py
+++ b/litex_boards/platforms/sipeed_tang_nano_9k.py
@@ -99,7 +99,7 @@ class Platform(GowinPlatform):
     default_clk_period = 1e9/27e6
 
     def __init__(self, toolchain="gowin"):
-        GowinPlatform.__init__(self, "GW1NR-LV9QN88PC6/I5", _io, _connectors, toolchain=toolchain, devicename="GW1N-9C")
+        GowinPlatform.__init__(self, "GW1NR-LV9QN88PC6/I5", _io, _connectors, toolchain=toolchain, devicename="GW1NR-9C")
         self.toolchain.options["use_mspi_as_gpio"] = 1
 
     def create_programmer(self, kit="openfpgaloader"):
diff --git a/litex_boards/targets/sipeed_tang_nano_9k.py b/litex_boards/targets/sipeed_tang_nano_9k.py
index 61857a875..a0de3257a 100755
--- a/litex_boards/targets/sipeed_tang_nano_9k.py
+++ b/litex_boards/targets/sipeed_tang_nano_9k.py
@@ -62,6 +62,7 @@ class BaseSoC(SoCCore):
     def __init__(self, sys_clk_freq=27e6, bios_flash_offset=0x0,
         with_led_chaser     = True,
         with_video_terminal = False,
+        no_sdram            = False,
         toolchain           = "gowin",
         **kwargs):
         platform = sipeed_tang_nano_9k.Platform(toolchain=toolchain)
@@ -88,7 +89,7 @@ def __init__(self, sys_clk_freq=27e6, bios_flash_offset=0x0,
         self.cpu.set_reset_address(self.bus.regions["rom"].origin)
 
         # HyperRAM ---------------------------------------------------------------------------------
-        if not self.integrated_main_ram_size:
+        if not no_sdram and not self.integrated_main_ram_size:
             # TODO: Use second 32Mbit PSRAM chip.
             dq      = platform.request("IO_psram_dq")
             rwds    = platform.request("IO_psram_rwds")
@@ -138,6 +139,7 @@ def main():
     parser.add_target_argument("--bios-flash-offset",    default="0x0",            help="BIOS offset in SPI Flash.")
     parser.add_target_argument("--with-spi-sdcard",      action="store_true",      help="Enable SPI-mode SDCard support.")
     parser.add_target_argument("--with-video-terminal",  action="store_true",      help="Enable Video Terminal (HDMI).")
+    parser.add_target_argument("--no-sdram",             action="store_true",      help="Disable SDRAM support.")
     parser.add_target_argument("--prog-kit",             default="openfpgaloader", help="Programmer select from Gowin/openFPGALoader.")
     args = parser.parse_args()
 
@@ -146,6 +148,7 @@ def main():
         sys_clk_freq        = args.sys_clk_freq,
         bios_flash_offset   = int(args.bios_flash_offset, 0),
         with_video_terminal = args.with_video_terminal,
+        no_sdram=args.no_sdram,
         **parser.soc_argdict
     )