From 5412d0e0e90ebeb8482a2588fd74f9d88e2efc6b Mon Sep 17 00:00:00 2001 From: Josuah Demangeon Date: Fri, 4 Aug 2023 20:47:32 +0200 Subject: [PATCH] platforms/crosslink_nx_evn: allow use of UARTBone This goes along a small resistor jumper modification and firmware flashing like it is for the ECP5 board. A warning message is added as the default serial might be affected (--serial serial by default). The FTDI modification software used for the ECP5 seems to be requried and matching. This can be tested this way: targets/lattice_crosslink_nx_evn.py --csr-csv=csr.csv --toolchain=oxide --programmer=openocd --uart-name crossover+uartbone --build --load litex_server --uart --uart-port /dev/ttyUSB1 litex_cli --regs --- litex_boards/platforms/lattice_crosslink_nx_evn.py | 10 ++++++++++ litex_boards/targets/lattice_crosslink_nx_evn.py | 6 ++++++ 2 files changed, 16 insertions(+) diff --git a/litex_boards/platforms/lattice_crosslink_nx_evn.py b/litex_boards/platforms/lattice_crosslink_nx_evn.py index a5ac08ea8..b16548250 100644 --- a/litex_boards/platforms/lattice_crosslink_nx_evn.py +++ b/litex_boards/platforms/lattice_crosslink_nx_evn.py @@ -259,6 +259,16 @@ def __init__(self, device="LIFCL-40-9BG400C", toolchain="radiant", **kwargs): assert device in ["LIFCL-40-9BG400C", "LIFCL-40-8BG400CES"] LatticeNexusPlatform.__init__(self, device, _io, _connectors, toolchain=toolchain, **kwargs) + def request(self, *args, **kwargs): + import time + if "serial" in args: + msg = "FT2232H will be used as serial, make sure that:\n" + msg += " -the hardware has been modified: R18 and R19 should be removed, two 0 Ω resistors shoud be populated on R15 (and not R16) and R17.\n" + msg += " -the chip is configured as UART with virtual COM on port B (With FTProg or https://github.com/trabucayre/fixFT2232_ecp5evn)." + print(msg) + time.sleep(2) + return LatticeNexusPlatform.request(self, *args, **kwargs) + def create_programmer(self, mode = "direct", prog="radiant"): assert mode in ["direct","flash"] assert prog in ["radiant","ecpprog"] diff --git a/litex_boards/targets/lattice_crosslink_nx_evn.py b/litex_boards/targets/lattice_crosslink_nx_evn.py index 6c1a3324a..4775f1baf 100755 --- a/litex_boards/targets/lattice_crosslink_nx_evn.py +++ b/litex_boards/targets/lattice_crosslink_nx_evn.py @@ -92,6 +92,12 @@ def __init__(self, sys_clk_freq=75e6, device="LIFCL-40-9BG400C", toolchain="radi pads = Cat(*[platform.request("user_led", i) for i in range(14)]), sys_clk_freq = sys_clk_freq) + # UARTBone --------------------------------------------------------------------------------- + debug_uart = False + if debug_uart: + self.add_uartbone() + + # Build -------------------------------------------------------------------------------------------- def main():