From 576865a50e6ccb74196c9491fa79575d6d7f0b0b Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Thu, 14 Nov 2024 10:23:37 +0000 Subject: [PATCH] Fix up MCPlusBuilder.cpp to account for W0_HI on AArch64 Landing #114827 broke these tests, because they did not account for the new artificial registers. --- bolt/unittests/Core/MCPlusBuilder.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/bolt/unittests/Core/MCPlusBuilder.cpp b/bolt/unittests/Core/MCPlusBuilder.cpp index c66c2d0c0fb16e..cd6f24c4570a79 100644 --- a/bolt/unittests/Core/MCPlusBuilder.cpp +++ b/bolt/unittests/Core/MCPlusBuilder.cpp @@ -90,14 +90,15 @@ INSTANTIATE_TEST_SUITE_P(AArch64, MCPlusBuilderTester, ::testing::Values(Triple::aarch64)); TEST_P(MCPlusBuilderTester, AliasX0) { - uint64_t AliasesX0[] = {AArch64::W0, AArch64::X0, AArch64::W0_W1, + uint64_t AliasesX0[] = {AArch64::W0, AArch64::W0_HI, + AArch64::X0, AArch64::W0_W1, AArch64::X0_X1, AArch64::X0_X1_X2_X3_X4_X5_X6_X7}; size_t AliasesX0Count = sizeof(AliasesX0) / sizeof(*AliasesX0); testRegAliases(Triple::aarch64, AArch64::X0, AliasesX0, AliasesX0Count); } TEST_P(MCPlusBuilderTester, AliasSmallerX0) { - uint64_t AliasesX0[] = {AArch64::W0, AArch64::X0}; + uint64_t AliasesX0[] = {AArch64::W0, AArch64::W0_HI, AArch64::X0}; size_t AliasesX0Count = sizeof(AliasesX0) / sizeof(*AliasesX0); testRegAliases(Triple::aarch64, AArch64::X0, AliasesX0, AliasesX0Count, true); }