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[MLIR][affine] Proper handling of vector load / stores in Affine dialect and transformations #115989
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@llvm/issue-subscribers-mlir-affine Author: None (dragondracarys007)
In the context of [Issue-115849](https://github.com//issues/115849) , I see that affine transformation is producing invalid IR like below where vector is being stored to a memref of size 1x1xf32.
`affine.vector_store %5, %alloc[0, 0] : memref<1x1xf32>, vector<64x64xf32> %6 = affine.vector_load %alloc[0, 0] : memref<1x1xf32>, vector<64x512xf32>` I think validity of the affine transformations need to be enhanced by introducing good verifiers. |
Hi! This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:
If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below. |
@llvm/issue-subscribers-good-first-issue Author: None (dragondracarys007)
In the context of [Issue-115849](https://github.com//issues/115849) , I see that affine transformation is producing invalid IR like below where vector is being stored to a memref of size 1x1xf32.
`affine.vector_store %5, %alloc[0, 0] : memref<1x1xf32>, vector<64x64xf32> %6 = affine.vector_load %alloc[0, 0] : memref<1x1xf32>, vector<64x512xf32>` I think validity of the affine transformations need to be enhanced by introducing good verifiers. |
In this case, the transformation that generated invalid IR shouldn't have happened in the first place. I seehttps://github.com//issues/115849 as an instance of this issue. |
In the context of Issue-115849 , I see that affine transformation is producing invalid IR like below where vector is being stored to a memref of size 1x1xf32.
`affine.vector_store %5, %alloc[0, 0] : memref<1x1xf32>, vector<64x64xf32>
%6 = affine.vector_load %alloc[0, 0] : memref<1x1xf32>, vector<64x512xf32>`
I think validity of the affine transformations need to be enhanced by introducing good verifiers.
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