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Ariane-v0.7-VGA is always black (Nexys A7 100T) (nexys-ddr4-rocket) #166
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How very strange, does the green ‘done’ LED come on when you press the reconfigure button? Have you tried the pre-made binaries in the release area of the website? |
Yes, It turns green. Before I build the project, I tried the pre-made binaries and It did not work in the same way. VGA is not really black, it is lighted, but has nothing showing on it. |
v0.6 when I reset the cpu, the led will be lighted colorfully. |
Have you tried the ‘make debug’ target. This would establish if the CPU is working. You can load in a program with gdb and test the operation that way. The bi-colour LEDs are not used by default in this release. What was the behaviour with the pre-made v0.7 target? |
layton@layton-X542UQR:~/lowrisc-chip-ariane-v0.7$ make debug Is it right? |
make gdb |
The make debug output appears to be correct. The make gdb usage is not correct. You need to run make debug in one window and make gdb in another window, and then use 'target remote :3333' to launch remote debugging. You can find more details here |
You can also try the command:
This will recompile the boot loader and create a patched bitstream, it should take less than 5 minutes the first time through. You should also examine the serial port output (if any) as output by the command:
where ? is a computer dependent number. |
I rebuild it using 'make nexys4_ddr_rocket_new' , and make debug , make gdb. Then I find the program can't run even if I set the breakpoint at the beginning of the main(). At the same time, the serial port has no information. |
Did you use the load command in gdb also? |
No, I did't |
I'm a newbie, now I'm in junior year. I am learning RISC-V,Please trouble you |
OK, I have added more detail to the documentation to get you going if possible. The correct usage of gdb is: target remote :3333 |
Thanks a lot. I will have a try. And learn knowledge about GDB. |
By the way, what version of Vivado are you using ? |
vivado 2018.3 |
Will it cause any problem? If yes, maybe i should install vivado2018.1 and retry |
It should be OK, but the one we use by default is 2018.2. If you are looking for other ideas to try, a different version of Vivado might be of interest. This is because each version has different versions of the intellectual property blocks as well as a change to the synthesis engine. |
Ok, if I can't sovel the problem, I will try 2018.2 |
What kind of VGA monitor are you using? Does it have a menu button that allows you to view the incoming vertical and horizontal frequency ? |
1400 *900 @60Hz |
When I input command 'load', the debug terminal shows: Info : accepting 'gdb' connection on tcp/3333 |
It's not working. I think your best option is to install Vivado 2018.2, rm -rf fpga/work-fpga and re-build. |
OK,thank you very much. |
I uninstall VIVADO 18.3 today, and using vivado 18.2 rebuild the project. However, I get the same result. information on the 'debug terminal' information on GDB terminal: |
I think if the pre-made binaries works , I should get the correct result if I program it using vivado. |
This is a profound mystery, these images were tested on the Nexys4-DDR board. I don't have an example of the newer Nexys A7-100T, to all accounts it is just a rename with the option of two different sized FPGAs. Without a complete transcript of your session, it is difficult to comment further. I presume when you reinstalled Vivado, you ticked the SDK option. You should also check out the fpga/reports directory to see if any errors were reported. Finally it might be worth trying a different board if you have access to one. |
Also, check what release you are using for pre-made images, you should use |
Thank you. I got right release, and ticked sdk when install 2018.2. Besides, I checked the report and found slack < 0. |
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Thank you. I got right release, and ticked sdk when install 2018.2. Besides, I checked the report and found slack < 0. |
Slack was -0.764ns on my build. More negative numbers are worse, so just checking for a number < 0 is not sufficient. |
Timing Report Slack (VIOLATED) : -1.278ns (required time - arrival time) |
it's really strange. I think slack(-1.278 ns) shouldn't result in CPU's not working |
Will the hardware cause such problems? Such as SD card? |
Perhaps, perhaps not. Your board could have a lower power voltage or slower chip than my one. The surprising thing is that running the exact same setup I have should give such a different result. This would explain why the pre-made images don't work. If you could borrow another board to try this would help solve the mystery. |
I used USB directly instead of DC to power the board |
I've troubled you these days, you are such a good person. I have been so grateful for your help |
I develop using USB supply from the PC also. However some PCs cannot supply enough current from the USB to power this board properly. A separate power supply might help, it depends how motivated you are to update to the latest release. It's my job to support and encourage adoption of this new release, however it comes to an end this Friday 6th March. After that only very limited support for queries will be available. |
Oh, I'm so lucky. I will try my best to finish it and Give you feedback these days |
The SD-Card is not used at this early stage in booting. There should be definitely be some text output on the screen before the SD-Card is accessed. |
Therefore, reason causing this strange problem should be borad and supply. I will continue to solve this problem. |
Hi, I get a new Nexys a7 and sucessfully run the linux. Now I want to add some new peripheral. How should I generate a vivado project? If there is a similar tcl script like make_project.tcl in v0.6? |
Probably best to close this issue and open a new one for posterity. The new flow doesn’t use .xpr files. You can customise your peripherals by adding to:
https://github.com/lowRISC/ariane/blob/ariane-v0.7/fpga/src/ariane_peripherals_xilinx.sv
and modifying the width of the arrays in the AXI demux module. You might need to add new pinout constraints also.
…Sent from my iPhone
On 23 Mar 2020, at 03:20, zlt323 ***@***.***> wrote:
Hi, I get a new Nexys a7 and sucessfully run the linux. Now I want to add some new peripheral. How should I generate a vivado project? If there is a similar tcl script like make_project.tcl in v0.6?
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Hi,
I have finish all the steps following https://www.cl.cam.ac.uk/~jrrk2/docs/xilinx/. After the command ''make nexys4_ddr_rocket_cfgmem'' ,
Mfg ID : 1 Memory Type : 20 Memory Capacity : 18 Device ID 1 : 0 Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation successful.
INFO: [Labtoolstcl 44-377] Flash programming completed successfully
program_hw_cfgmem: Time (s): cpu = 00:00:00.92 ; elapsed = 00:05:28 . Memory (MB): peak = 2208.875 ; gain = 31.000 ; free physical = 3284 ; free virtual = 20889
endgroup
INFO: [Common 17-206] Exiting Vivado at Sun Mar 1 21:11:36 2020...
make[1]: Leaving directory '/home/layton/lowrisc-chip-ariane-v0.7/fpga'
After I insert the SD-card, set all the SW to '0' and PROG , my VGA is alway black.
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