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BTL-ThietKeLuanLyHDL

Implement Tic-Tac-Toe game with Verilog on FPGA

Requirement

Description

  • tic_tac_toe.v is the main module link to other modules
  • For each move, check_move.v will check if that is a valid move (on its turn & no one has moved in), else player has to rollback to previous move before continue
  • After a valid move, check_state.v will check if anyone win or draw if all the blocks are moved in, else the game continue