diff --git a/Makefile b/Makefile
index f864f18c..f0b931fe 100644
--- a/Makefile
+++ b/Makefile
@@ -27,10 +27,11 @@ FENNEL=fennel
 BIN = $(TARGET).bin
 
 DEFS = -DUSE_STDPERIPH_DRIVER -DSTM32F7XX -DARM_MATH_CM7 -DHSE_VALUE=8000000
-DEFS += -DSTM32F722xx -DUSE_HAL_DRIVER
-STARTUP = $(CUBE)/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/startup_stm32f722xx.s
+DEFS += -DSTM32F767xx -DUSE_HAL_DRIVER
+STARTUP = $(CUBE)/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/startup_stm32f767xx.s
 
-MCFLAGS = -mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16
+# MCFLAGS = -mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16
+MCFLAGS = -mthumb -march=armv7e-m -mfloat-abi=hard -mfpu=fpv5-d16
 
 STM32_INCLUDES = \
 	-I$(WRLIB)/ \
@@ -93,13 +94,26 @@ SRC = main.c \
 	$(HALS)/stm32f7xx_hal_pwr.c \
 	$(HALS)/stm32f7xx_hal_pwr_ex.c \
 	$(HALS)/stm32f7xx_hal_rng.c \
+	$(HALS)/stm32f7xx_hal_sai.c \
 	$(HALS)/stm32f7xx_hal_spi.c \
 	$(HALS)/stm32f7xx_hal_tim.c \
 	$(HALS)/stm32f7xx_hal_tim_ex.c \
 	$(HALS)/stm32f7xx_hal_uart.c \
 	$(HALS)/stm32f7xx_hal_usart.c \
 	$(HALS)/stm32f7xx_ll_usb.c \
-	$(wildcard lib/*.c) \
+	lib/ashapes.c \
+	lib/bootloader.c \
+	lib/casl.c \
+	lib/caw.c \
+	lib/clock_ll.c \
+	lib/detect.c \
+	lib/events.c \
+	lib/flash.c \
+	lib/ftrack.c \
+	lib/io.c \
+	lib/metro.c \
+	lib/shapes.c \
+	lib/slopes.c \
 	$(wildcard ll/*.c) \
 	$(wildcard usbd/*.c) \
 	$(USBD)/Core/Src/usbd_core.c \
@@ -176,10 +190,10 @@ LUALIB_OBJS=	lauxlib.o lbaselib.o lbitlib.o lcorolib.o ldblib.o liolib.o \
 # build the objects from c source
 OBJDIR = .
 OBJS = $(SRC:%.c=$(OBJDIR)/%.o)
-OBJS += $(addprefix $(LUAS)/,$(LUACORE_OBJS) $(LUALIB_OBJS) )
+# OBJS += $(addprefix $(LUAS)/,$(LUACORE_OBJS) $(LUALIB_OBJS) )
 OBJS += Startup.o
 
-$(OBJS): $(LUA_PP)
+# $(OBJS): $(LUA_PP)
 
 # specific objects that require built dependencies (ii)
 $(OBJDIR)/lib/l_bootstrap.o: $(LUA_PP) #$(BUILD_DIR)/ii_lualink.h
@@ -236,14 +250,14 @@ $(BIN): $(EXECUTABLE)
 	# 512kb -64kb(bootloader) -128kb(scripts)
 
 flash: $(BIN)
-	st-flash write $(BIN) 0x08020000
+	st-flash write $(BIN) 0x08000000
 
 debug:
 	make flash TRACE=1
 	stlink-trace -c 216
 
 dfu: $(BIN)
-	sudo dfu-util -a 0 -s 0x08020000 -R -D $(BIN) -d ,0483:df11
+	sudo dfu-util -a 0 -s 0x08000000 -R -D $(BIN) -d ,0483:df11
 
 dfureset:
 	@stty -F /dev/ttyACM0 raw speed 115200
@@ -254,7 +268,7 @@ pydfu: $(TARGET).dfu $(BIN)
 	@python3 util/pydfu.py -u $<
 
 $(TARGET).dfu: $(BIN)
-	python3 util/dfu.py -D 0x0483:0xDF11 -b 0x08020000:$^ $@
+	python3 util/dfu.py -D 0x0483:0xDF11 -b 0x08000000:$^ $@
 
 boot:
 	cd $(BOOTLOADER) && \
diff --git a/crow.dfu b/crow.dfu
new file mode 100644
index 00000000..663d95b4
Binary files /dev/null and b/crow.dfu differ
diff --git a/lib/io.c b/lib/io.c
index 4167bce7..45568855 100644
--- a/lib/io.c
+++ b/lib/io.c
@@ -3,7 +3,7 @@
 #include <stdio.h>
 #include "stm32f7xx_hal.h"     // HAL_Delay()
 
-#include "../ll/adda.h"        // _Init(), _Start(), _GetADCValue(), IO_block_t
+// #include "../ll/adda.h"        // _Init(), _Start(), _GetADCValue(), IO_block_t
 #include "slopes.h"            // S_init(), S_step_v()
 #include "ashapes.h"           // AShaper_init(), AShaper_v()
 #include "detect.h"            // Detect_init(), Detect(), Detect_ix_to_p()
@@ -37,25 +37,35 @@ void IO_Start( void )
 }
 
 // DSP process
+static float saw = 0.f;
 IO_block_t* IO_BlockProcess( IO_block_t* b )
 {
-    for( int j=0; j<IN_CHANNELS; j++ ){
-        Detect_t* d = Detect_ix_to_p(j);
-        (*d->modefn)( d, b->in[j][b->size-1] );
-    }
-    for( int j=0; j<SLOPE_CHANNELS; j++ ){
-        S_step_v( j
-                , b->out[j]
-                , b->size
-                );
-    }
-    for( int j=0; j<SLOPE_CHANNELS; j++ ){
-        AShaper_v( j
-                 , b->out[j]
-                 , b->size
-                 );
+    // for( int j=0; j<IN_CHANNELS; j++ ){
+    //     Detect_t* d = Detect_ix_to_p(j);
+    //     (*d->modefn)( d, b->in[j][b->size-1] );
+    // }
+    // for( int j=0; j<SLOPE_CHANNELS; j++ ){
+    //     S_step_v( j
+    //             , b->out[j]
+    //             , b->size
+    //             );
+    // }
+    // for( int j=0; j<SLOPE_CHANNELS; j++ ){
+    //     AShaper_v( j
+    //              , b->out[j]
+    //              , b->size
+    //              );
+    // }
+
+    saw += 0.001f;
+    saw = (saw > 1.f) ? saw - 1.f : saw;
+    for(int i=0; i<SLOPE_CHANNELS; i++){
+        for(int s=0; s<(b->size); s++){
+            b->out[i][s] = saw;
+        }
     }
-    public_update();
+
+    // public_update();
     return b;
 }
 float IO_GetADC( uint8_t channel )
diff --git a/lib/io.h b/lib/io.h
index 61d09960..f20aea6d 100644
--- a/lib/io.h
+++ b/lib/io.h
@@ -3,10 +3,13 @@
 #include <stm32f7xx.h>
 #include <stdbool.h>
 
+#include "../ll/adda.h"        // _Init(), _Start(), _GetADCValue(), IO_block_t
+
 void IO_Init( int adc_timer_ix );
 void IO_Start( void );
 
 void IO_Process( void );
+IO_block_t* IO_BlockProcess( IO_block_t* b );
 
 float IO_GetADC( uint8_t channel );
 void IO_SetADCaction( uint8_t channel, const char* mode );
diff --git a/lib/repl.c b/lib/repl.c
index e83af7e0..dd129757 100644
--- a/lib/repl.c
+++ b/lib/repl.c
@@ -1,5 +1,6 @@
 #include "repl.h"
 
+/*
 #include <stdlib.h> // malloc(), free()
 #include <string.h> // memcpy()
 #include <stdbool.h>
@@ -219,3 +220,5 @@ static char* REPL_script_name_from_mem( char* dest, char* src, int max_len )
     dest[len] = '\0';
     return dest;
 }
+
+*/
diff --git a/lib/repl.h b/lib/repl.h
index 32a64966..e0e31373 100644
--- a/lib/repl.h
+++ b/lib/repl.h
@@ -3,9 +3,9 @@
 #include <stm32f7xx.h>
 
 // lua_State*
-#include "../submodules/lua/src/lua.h"
-#include "../submodules/lua/src/lauxlib.h"
-#include "../submodules/lua/src/lualib.h"
+// #include "../submodules/lua/src/lua.h"
+// #include "../submodules/lua/src/lauxlib.h"
+// #include "../submodules/lua/src/lualib.h"
 
 #include "lualink.h" // ErrorHandler_t, Lua_eval(), Lua_load_default_script()
 
diff --git a/lib/slopes.h b/lib/slopes.h
index 6ad7b8bf..dd8ef2c7 100644
--- a/lib/slopes.h
+++ b/lib/slopes.h
@@ -39,7 +39,7 @@ typedef struct{
     float shaped; // current shaped output voltage
 } Slope_t;
 
-#define SLOPE_CHANNELS 4
+#define SLOPE_CHANNELS 8
 
 // refactor for dynamic SLOPE_CHANNELS
 // refactor for dynamic SAMPLE_RATE
diff --git a/ll/adda.c b/ll/adda.c
index fb7647e9..28fdafc4 100644
--- a/ll/adda.c
+++ b/ll/adda.c
@@ -4,8 +4,9 @@
 #include <stdio.h>
 
 #include "debug_pin.h"
-#include "ads131.h"
-#include "dac8565.h"
+// #include "ads131.h"
+// #include "dac8565.h"
+#include "dac108.h"
 
 #include "../lib/flash.h"              // FLASH_*_t
 #include "cal_ll.h"      // CAL_LL_Init(),
@@ -19,7 +20,7 @@ typedef struct {
 
 typedef struct {
     CAL_chan_t  adc[2];
-    CAL_chan_t  dac[4];
+    CAL_chan_t  dac[8];
 } CAL_t;
 
 static CAL_t cal;
@@ -28,29 +29,27 @@ static void CAL_ReadFlash( void );
 
 uint16_t ADDA_Init( int adc_timer_ix )
 {
-    ADC_Init( ADDA_BLOCK_SIZE
-            , ADDA_ADC_CHAN_COUNT
-            , adc_timer_ix
-            );
+    // ADC_Init( ADDA_BLOCK_SIZE
+    //         , ADDA_ADC_CHAN_COUNT
+    //         , adc_timer_ix
+    //         );
     DAC_Init( ADDA_BLOCK_SIZE
             , ADDA_DAC_CHAN_COUNT
             );
-    CAL_LL_Init();
-    CAL_ReadFlash();
+    // CAL_LL_Init();
+    // CAL_ReadFlash();
     return ADDA_BLOCK_SIZE;
 }
 
-void ADDA_Start( void )
-{
+void ADDA_Start( void ){
     DAC_Start();
 }
 
-void ADDA_BlockProcess( uint32_t* dac_pickle_ptr )
-{
-    IO_block_t b = { .size = ADDA_BLOCK_SIZE };
-    ADC_UnpickleBlock( b.in[0]
-                     , ADDA_BLOCK_SIZE
-                     );
+static IO_block_t b = { .size = ADDA_BLOCK_SIZE };
+void ADDA_BlockProcess( uint32_t* dac_pickle_ptr ){
+    // ADC_UnpickleBlock( b.in[0]
+    //                  , ADDA_BLOCK_SIZE
+    //                  );
     IO_BlockProcess( &b );
     DAC_PickleBlock( dac_pickle_ptr
                    , b.out[0]
@@ -58,18 +57,16 @@ void ADDA_BlockProcess( uint32_t* dac_pickle_ptr )
                    );
 }
 
-float ADDA_GetADCValue( uint8_t channel )
-{
-    return ADC_GetValue( channel );
+float ADDA_GetADCValue( uint8_t channel ){
+    return 0.f;
+    // return ADC_GetValue( channel );
 }
 
-__weak IO_block_t* IO_BlockProcess( IO_block_t* b )
-{
+__weak IO_block_t* IO_BlockProcess( IO_block_t* b ){
     for( uint16_t i=0; i<(b->size); i++ ){
-        b->out[0][i] = b->in[0][i];
-        b->out[1][i] = b->in[1][i];
-        b->out[2][i] = 2.0;
-        b->out[3][i] = 3.0;
+        for(int j=0; j<8; j++){
+            b->out[j][i] = 0.0;
+        }
     }
     return b;
 }
@@ -78,8 +75,7 @@ __weak IO_block_t* IO_BlockProcess( IO_block_t* b )
 ////////////////////////////////////////////
 // Calibration
 
-void CAL_WriteFlash( void )
-{
+void CAL_WriteFlash( void ){
     if( Flash_write_calibration( (uint8_t*)(&cal)
                                , sizeof(CAL_chan_t) * (2+4)
                                ) ){
@@ -93,15 +89,14 @@ void CAL_WriteFlash( void )
     }
 }
 
-void CAL_Set( int chan, CAL_Param_t param, float val )
-{
+void CAL_Set( int chan, CAL_Param_t param, float val ){
     if(chan >= 1 && chan <= 2){ // adc
         if(param == CAL_Offset){
             cal.adc[chan-1].shift = val;
-            ADC_CalibrateShift(chan-1, val);
+            // ADC_CalibrateShift(chan-1, val);
         } else {
             cal.adc[chan-1].scale = val;
-            ADC_CalibrateScalar(chan-1, val);
+            // ADC_CalibrateScalar(chan-1, val);
         }
     } else if( chan >= 3 && chan <= 6){ // dac
         if(param == CAL_Offset){
@@ -114,8 +109,7 @@ void CAL_Set( int chan, CAL_Param_t param, float val )
     }
 }
 
-float CAL_Get( int chan, CAL_Param_t param )
-{
+float CAL_Get( int chan, CAL_Param_t param ){
     if(chan >= 1 && chan <= 2){ // adc
         if(param == CAL_Offset){
             return cal.adc[chan-1].shift;
@@ -131,22 +125,20 @@ float CAL_Get( int chan, CAL_Param_t param )
     } else { return 0.0; }
 }
 
-static void CAL_Defaults( void )
-{
+static void CAL_Defaults( void ){
     for( int j=1; j<7; j++ ){
         CAL_Set(j, CAL_Offset, 0.0);
         CAL_Set(j, CAL_Scale, 1.0);
     }
 }
 
-static void CAL_ReadFlash( void )
-{
+static void CAL_ReadFlash( void ){
     if( !Flash_read_calibration( (uint8_t*)(&cal)
                                , sizeof(CAL_chan_t) * (2+4)
                                ) ){
         for( int j=0; j<2; j++ ){
-            ADC_CalibrateShift( j, cal.adc[j].shift );
-            ADC_CalibrateScalar( j, cal.adc[j].scale );
+            // ADC_CalibrateShift( j, cal.adc[j].shift );
+            // ADC_CalibrateScalar( j, cal.adc[j].scale );
         }
         for( int j=0; j<4; j++ ){
             DAC_CalibrateOffset( j, cal.dac[j].shift );
diff --git a/ll/adda.h b/ll/adda.h
index 3079f1be..3c112e38 100644
--- a/ll/adda.h
+++ b/ll/adda.h
@@ -2,8 +2,8 @@
 
 #include <stm32f7xx.h>
 
-#define ADDA_BLOCK_SIZE     32
-#define ADDA_DAC_CHAN_COUNT 4
+#define ADDA_BLOCK_SIZE     2 // 32
+#define ADDA_DAC_CHAN_COUNT 8
 #define ADDA_ADC_CHAN_COUNT 2
 
 typedef struct{
diff --git a/ll/ads131.c b/ll/ads131.c
deleted file mode 100644
index de7d3261..00000000
--- a/ll/ads131.c
+++ /dev/null
@@ -1,519 +0,0 @@
-#include "ads131.h"
-
-#include <stm32f7xx_hal.h>
-#include <stdio.h>
-
-#include "timers.h"
-#include "debug_pin.h"
-
-#define ADC_FRAMES     3 // status word, plus 2 channels
-#define ADC_BUF_SIZE   (ADS_DATAWORDSIZE * ADC_FRAMES)
-//#define ADC_BUF_SIZE   (ADC_FRAMES)
-
-#define NSS_DELAY 10000
-#define DELAY_usec(u) \
-    do{ for( volatile int i=0; i<u; i++ ){;;} \
-    } while(0);
-
-SPI_HandleTypeDef adc_spi;
-TIM_HandleTypeDef adc_tim;
-TIM_OC_InitTypeDef tim_config;
-uint16_t aRxBuffer[ADC_BUF_SIZE];
-uint16_t aTxBuffer[ADC_BUF_SIZE];
-
-#define ADC_COUNTT 2
-uint8_t  adc_count = ADC_COUNTT;
-uint32_t adc_samp_count = 64;
-
-float adc_calibrated_scalar[ADC_COUNTT];
-float adc_calibrated_shift[ADC_COUNTT];
-
-int timer_index_ads;
-
-void ADS_Init_Sequence(void);
-void ADS_Reset_Device(void);
-uint8_t ADS_IsReady( void );
-uint16_t ADS_Cmd( uint16_t command );
-uint16_t ADS_Reg( uint8_t reg_mask, uint8_t val );
-void ADC_TxRx( uint16_t* aTxBuffer, uint16_t* aRxBuffer, uint32_t size );
-void ADC_Rx( uint16_t* aRxBuffer, uint32_t size );
-uint8_t _ADC_CheckErrors( uint16_t error_mask );
-//uint8_t _ADC_CheckErrors( uint16_t expect, uint16_t error );
-
-// background wait for NSS delay
-static void ADC_UnpickleBlock_Cont( int unused );
-
-#define ADC_U16_TO_V        ((float)(15.0 / 65535.0))
-
-void ADC_Init( uint16_t bsize, uint8_t chan_count, int timer_ix )
-{
-    adc_count  = chan_count;
-    adc_samp_count = bsize * chan_count;
-
-    // Set the SPI parameters
-    adc_spi.Instance               = SPIa;
-    adc_spi.Init.Mode              = SPI_MODE_MASTER;
-    adc_spi.Init.Direction         = SPI_DIRECTION_2LINES;
-    adc_spi.Init.DataSize          = SPI_DATASIZE_16BIT;
-    adc_spi.Init.CLKPolarity       = SPI_POLARITY_LOW;
-    adc_spi.Init.CLKPhase          = SPI_PHASE_2EDGE;
-    adc_spi.Init.NSS               = SPI_NSS_SOFT;
-    adc_spi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128; // 1.2MHz
-    adc_spi.Init.FirstBit          = SPI_FIRSTBIT_MSB;
-    adc_spi.Init.TIMode            = SPI_TIMODE_DISABLE;
-    adc_spi.Init.CRCCalculation    = SPI_CRCCALCULATION_DISABLE;
-    adc_spi.Init.CRCPolynomial     = 7;
-    if(HAL_SPI_Init(&adc_spi) != HAL_OK){ printf("spi_init\n"); }
-
-
-// 216/27 = 8MHz. then /2 and /2 in the ads clocks so 2MHz fMOD
-    // thus 500nS per clock
-// then we average OSR to 512 samples
-    // so 256uS per clock
-    // then we give ~600uS to reset & resettle
-    
-
-    //uint32_t prescaler = (uint32_t)((SystemCoreClock / 10000)-1);
-    uint32_t period_value = 27-1; // 8MHz
-    adc_tim.Instance = TIMa;
-    adc_tim.Init.Period = period_value;
-    // adc_tim.Init.Prescaler = 3; //prescaler;
-    adc_tim.Init.Prescaler = 0; //prescaler;
-    adc_tim.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-    adc_tim.Init.CounterMode = TIM_COUNTERMODE_UP;
-    if(HAL_TIM_PWM_Init(&adc_tim) != HAL_OK){ printf("tim_init\n"); }
-
-    tim_config.OCMode       = TIM_OCMODE_PWM1;
-    tim_config.OCPolarity   = TIM_OCPOLARITY_HIGH;
-    tim_config.OCFastMode   = TIM_OCFAST_DISABLE;
-    tim_config.OCNPolarity  = TIM_OCNPOLARITY_HIGH;
-    tim_config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
-    tim_config.OCIdleState  = TIM_OCIDLESTATE_RESET;
-    tim_config.Pulse        = period_value/2;
-    if(HAL_TIM_PWM_ConfigChannel(&adc_tim, &tim_config, TIMa_CHANNEL) != HAL_OK){
-        printf("tim_config\n");
-    }
-    if(HAL_TIM_PWM_Start( &adc_tim, TIMa_CHANNEL ) != HAL_OK){
-        printf("tim_st\n");
-    }
-
-    for( uint8_t i=0; i<ADC_BUF_SIZE; i++ ){
-        aRxBuffer[i] = 0;
-        aTxBuffer[i] = 0;
-    }
-    for( uint8_t i=0; i<ADC_COUNTT; i++ ){
-        adc_calibrated_scalar[i] = ADC_U16_TO_V;
-        adc_calibrated_shift[i] = 2.5;
-    }
-
-    // basically the ADC has a *resync* event every time bc the MCLK is not in phase with SPI
-    // i tried for ages to get them aligned, but i think it requires 1) hardware change (to use I2S) or
-    // 2) big architectural changes in the dsp block processing.
-
-    // instead we have *increased* this delay
-    // after NSS goes low, the *resync* error occurs, and the sinc3 filter is reset.
-    // it continues sampling while it awaits the SPI transmission.
-    // so we increase the delay time to the max, to be able to use the highest OSR ratio
-    timer_index_ads = timer_ix;
-    Timer_Set_Params( timer_index_ads, 0.00063 ); // 630uS (block is 666uS)
-    Timer_Priority( timer_index_ads, ADC_IRQPriority );
-
-    ADS_Init_Sequence();
-}
-
-void ADS_Init_Sequence(void)
-{
-    ADS_Reset_Device();
-
-    ADS_Cmd(ADS_UNLOCK);
-    if( ADS_Cmd(ADS_NULL) != ADS_UNLOCK ){ printf("Can't Unlock\n"); }
-
-    // CONFIGURE REGS HERE
-    ADS_Reg(ADS_WRITE_REG | ADS_CLK1, 0x02); // fICLK = MCLK/2
-    //printf( "%i\n",ADS_Cmd(ADS_NULL) ); // assert ADS_CLK1
-        // 0x02 is /2 which is least divisions (fastest internal)
-        // meaning slowest clkout from uc and least noise.
-    // ADS_Reg(ADS_WRITE_REG | ADS_CLK2, 0x25); // fMOD = fICLK/2, OSR = 512
-    // ADS_Reg(ADS_WRITE_REG | ADS_CLK2, 0x27); // fMOD = fICLK/2, OSR = 384
-
-// weirdly, we choose the OSR value by increasing the multiplier until the DRDY error flag is set
-    // we actualy *want* this error flag set, bc it infers the filter has settled
-    ADS_Reg(ADS_WRITE_REG | ADS_CLK2, 0x28); // fMOD = fICLK/2, OSR = 256
-    // ADS_Reg(ADS_WRITE_REG | ADS_CLK2, 0x2a); // fMOD = fICLK/2, OSR = 192
-    // 0x2* sets clockdiv to /2 (the least divisions, for slowest MCLK)
-    // 0x*b was lowest (ie most oversampling) where -5v actually reached 0x8000
-    // using 0x*c for safety
-    ADS_Reg(ADS_WRITE_REG | ADS_ADC_ENA, 0x03); // contrasts with datasheet
-        // 0x03 is a bitwise mask of enabled channels
-        // confirmed that ADS_Reg response agrees
-    ADS_Cmd(ADS_WAKEUP);
-
-    ADS_Cmd(ADS_LOCK);
-}
-void ADS_Reset_Device(void)
-{
-    ADS_IsReady(); // send query
-    if(ADS_IsReady()){ return; } // ready to go!
-
-    // not ready: reset
-    HAL_GPIO_WritePin( SPIa_NRST_GPIO_PORT, SPIa_NRST_PIN, 0 );
-    HAL_Delay(5); // reset can take up to 4.5ms (p35)
-    HAL_GPIO_WritePin( SPIa_NRST_GPIO_PORT, SPIa_NRST_PIN, 1 );
-    HAL_Delay(5); // reset can take up to 4.5ms (p35)
-
-    while(!ADS_IsReady()){} // needs timeout
-    ADS_Cmd(ADS_NULL);
-}
-uint16_t ADS_Reg( uint8_t reg_mask, uint8_t val )
-{
-    uint16_t retval = 0;
-
-    if( (reg_mask & ADS_READ_REG) == ADS_READ_REG ){ // read
-        ADS_Cmd( ((uint16_t)reg_mask) << 8);         // send query
-        retval = ADS_Cmd( ADS_NULL );                // get response
-    } else { // write
-        retval = ADS_Cmd( ((uint16_t)reg_mask) << 8 | val );
-        // write success assertion
-        uint16_t status = ADS_Cmd(ADS_NULL);
-        uint16_t expect = ( ((reg_mask & 0x1F) | 0x20)<<8
-                          | val
-                          );
-        if( status != expect ){
-            printf("!WREG expect: %x\n", expect);
-            printf("received: %x\n", status);
-        }
-    }
-    return retval;
-}
-
-uint8_t ADS_IsReady( void )
-{
-    uint32_t* tx = (uint32_t*)aTxBuffer;
-    uint32_t* rx = (uint32_t*)aRxBuffer;
-    *tx++ = 0;
-    *rx++ = 0;
-    ADC_Rx( aRxBuffer, 2 );
-
-    return (aRxBuffer[0] == ADS_READY);
-}
-
-uint16_t ADS_Cmd( uint16_t command )
-{
-    aTxBuffer[0] = command;
-    aRxBuffer[0] = 0;
-    ADC_TxRx( aTxBuffer, aRxBuffer, 1);
-
-    return aRxBuffer[0];
-}
-
-static float last[2] = {0.0,0.0};
-void ADC_UnpickleBlock( float*   unpickled
-                      , uint16_t bsize
-                      )
-{
-    float* unpick = unpickled;
-    // Return current buf
-    for( uint8_t j=0; j<adc_count; j++ ){
-        // cast to signed -> cast to float -> scale -> shift
-        float once = ((float)((int16_t*)aRxBuffer)[j+1]) // +1 past status byte
-                        * adc_calibrated_scalar[j]
-                        + adc_calibrated_shift[j];
-        for( uint16_t i=0; i<bsize; i++ ){
-            *unpick++ = once; // copy single value into whole block
-        }
-        last[j] = once;
-    }
-
-    // Request next buffer
-    if (HAL_SPI_GetState(&adc_spi) == HAL_SPI_STATE_READY){
-        HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 0 );
-        // Use the timer to delay continuation while ADC collects data
-        Timer_Start( timer_index_ads, &ADC_UnpickleBlock_Cont );
-    } else {
-        printf("!ADC driver busy\n");
-    }
-}
-
-static void ADC_UnpickleBlock_Cont( int unused )
-{
-    *aTxBuffer = 0x0000; // NULL command
-    BLOCK_IRQS(
-        if(HAL_SPI_TransmitReceive_DMA( &adc_spi
-                                      , (uint8_t*)aTxBuffer
-                                      , (uint8_t*)aRxBuffer
-                                      , ADC_FRAMES
-                                      ) != HAL_OK ){
-            printf("spi_txrx_fail\n");
-        }
-    );
-    Timer_Stop( timer_index_ads );
-}
-
-void ADC_CalibrateScalar( uint8_t channel, float scale )
-{
-    adc_calibrated_scalar[channel] = ADC_U16_TO_V * scale;
-}
-
-void ADC_CalibrateShift( uint8_t channel, float volts )
-{
-    adc_calibrated_shift[channel] = 2.5 + volts;
-}
-
-float ADC_GetValue( uint8_t channel )
-{
-    return last[!!channel]; // force 0/1
-}
-
-void ADC_Rx( uint16_t* aRxBuffer, uint32_t size )
-{
-    // pull !SYNC low
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 0 );
-    DELAY_usec(NSS_DELAY);
-    BLOCK_IRQS(
-        if(HAL_SPI_Receive_DMA( &adc_spi
-                              , (uint8_t*)aRxBuffer
-                              , size
-                              ) != HAL_OK ){
-            printf("spi_rx_fail\n");
-        }
-    );
-    // just wait til it's done (for now)
-    while (HAL_SPI_GetState(&adc_spi) != HAL_SPI_STATE_READY){;;}
-}
-
-void ADC_TxRx( uint16_t* aTxBuffer, uint16_t* aRxBuffer, uint32_t size )
-{
-    // pull !SYNC low
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 0 );
-    DELAY_usec(NSS_DELAY);
-    BLOCK_IRQS(
-        if(HAL_SPI_TransmitReceive_DMA( &adc_spi
-                                      , (uint8_t*)aTxBuffer
-                                      , (uint8_t*)aRxBuffer
-                                      , size
-                                      ) != HAL_OK ){
-            printf("spi_txrx_fail\n");
-        }
-    );
-    // just wait til it's done (for now)
-    while (HAL_SPI_GetState(&adc_spi) != HAL_SPI_STATE_READY){;;}
-}
-
-uint8_t _ADC_CheckErrors( uint16_t error )
-{
-    uint8_t retval = 0;
-    //error = error >> 8;
-    if( error != 0 ){ // fault handler
-        retval = 1;
-        if( error & 0x2 ){} // Data ready fault
-        if( error & 0x4 ){ // Resync fault
-            //printf("sync\n");
-        }
-        if( error & 0x8 ){ // Watchdog timer
-            printf("watchdog\n");
-        }
-        if( error & 0x10 ){ // ADC input fault
-            //printf("adc_p: %i\n", ADS_Reg( ADS_READ_REG | ADS_STAT_P, 0 ));
-            //printf("adc_n: %i\n", ADS_Reg( ADS_READ_REG | ADS_STAT_N, 0 ));
-        }
-        if( error & 0x20  ){ // SPI fault
-            //printf("spi: %i\n", ADS_Reg( ADS_READ_REG | ADS_STAT_S, 0 ));
-        }
-        if( error & 0x40 ){ // Command fault
-            //printf("ADS bad_cmd\n");
-            return 2;
-        }
-    }
-    return retval;
-}
-void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
-{
-    printf("ads spi_error\n");
-    // pull NSS high to cancel any ongoing transmission
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 1 );
-}
-
-void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-    //printf("txrx-cb\n");
-    // signal end of transmission by pulling NSS high
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 1 );
-}
-
-void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
-{
-    //printf("rx-cb\n");
-    // signal end of transmission by pulling NSS high
-    //_ADC_CheckErrors( aRxBuffer[0] );
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 1 );
-}
-
-void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
-{
-    static DMA_HandleTypeDef hdma_rx;
-    static DMA_HandleTypeDef hdma_tx;
-
-    GPIO_InitTypeDef  GPIO_InitStruct;
-
-    SPIa_NSS_GPIO_CLK_ENABLE();
-    SPIa_SCK_GPIO_CLK_ENABLE();
-    SPIa_MISO_GPIO_CLK_ENABLE();
-    SPIa_MOSI_GPIO_CLK_ENABLE();
-
-    SPIa_NRST_GPIO_CLK_ENABLE();
-
-    SPIa_CLK_ENABLE();
-
-    SPIa_DMAx_CLK_ENABLE();
-
-    // GPIO pins
-    GPIO_InitStruct.Pin       = SPIa_SCK_PIN;
-    GPIO_InitStruct.Speed     = GPIO_SPEED_FAST;
-    GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Alternate = SPIa_SCK_AF;
-    HAL_GPIO_Init(SPIa_SCK_GPIO_PORT, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin       = SPIa_MISO_PIN;
-    GPIO_InitStruct.Alternate = SPIa_MISO_AF;
-    HAL_GPIO_Init(SPIa_MISO_GPIO_PORT, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin       = SPIa_MOSI_PIN;
-    GPIO_InitStruct.Alternate = SPIa_MOSI_AF;
-    HAL_GPIO_Init(SPIa_MOSI_GPIO_PORT, &GPIO_InitStruct);
-
-    // NSS & NRST handled manually
-    GPIO_InitStruct.Pin       = SPIa_NSS_PIN;
-    GPIO_InitStruct.Pull      = GPIO_PULLUP;
-    GPIO_InitStruct.Mode      = GPIO_MODE_OUTPUT_PP;
-    HAL_GPIO_Init(SPIa_NSS_GPIO_PORT, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin       = SPIa_NRST_PIN;
-    GPIO_InitStruct.Pull      = GPIO_PULLUP;
-    GPIO_InitStruct.Mode      = GPIO_MODE_OUTPUT_PP;
-    HAL_GPIO_Init(SPIa_NRST_GPIO_PORT, &GPIO_InitStruct);
-
-    // pull NSS high immediately (resting state)
-    HAL_GPIO_WritePin( SPIa_NRST_GPIO_PORT, SPIa_NRST_PIN, 1 );
-    HAL_GPIO_WritePin( SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN, 1 );
-
-    // DMA Streams
-    hdma_tx.Instance                 = SPIa_TX_DMA_STREAM;
-
-    hdma_tx.Init.Channel             = SPIa_TX_DMA_CHANNEL;
-    hdma_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
-    hdma_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
-    hdma_tx.Init.MemInc              = DMA_MINC_ENABLE;
-    hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
-    hdma_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
-    hdma_tx.Init.Mode                = DMA_NORMAL;
-    hdma_tx.Init.Priority            = DMA_PRIORITY_LOW;
-    hdma_tx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
-    hdma_tx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
-    hdma_tx.Init.MemBurst            = DMA_MBURST_INC4;
-    hdma_tx.Init.PeriphBurst         = DMA_PBURST_INC4;
-
-    HAL_DMA_Init(&hdma_tx);
-
-    // Associate SPI w/ DMA
-    __HAL_LINKDMA(hspi, hdmatx, hdma_tx);
-
-    // Reception:
-    hdma_rx.Instance                 = SPIa_RX_DMA_STREAM;
-
-    hdma_rx.Init.Channel             = SPIa_RX_DMA_CHANNEL;
-    hdma_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
-    hdma_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
-    hdma_rx.Init.MemInc              = DMA_MINC_ENABLE;
-    hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
-    hdma_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
-    hdma_rx.Init.Mode                = DMA_NORMAL;
-    hdma_rx.Init.Priority            = DMA_PRIORITY_LOW;
-    hdma_rx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
-    hdma_rx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
-    hdma_rx.Init.MemBurst            = DMA_MBURST_INC4;
-    hdma_rx.Init.PeriphBurst         = DMA_PBURST_INC4;
-
-    HAL_DMA_Init(&hdma_rx);
-
-    // Associate SPI w/ DMA
-    __HAL_LINKDMA(hspi, hdmarx, hdma_rx);
-
-
-    // DMA Priority (should be below IO, but above main process)
-    HAL_NVIC_SetPriority( SPIa_DMA_TX_IRQn
-                        , SPIa_DMA_TX_IRQPriority
-                        , SPIa_DMA_TX_IRQSubPriority
-                        );
-    HAL_NVIC_EnableIRQ( SPIa_DMA_TX_IRQn );
-
-    HAL_NVIC_SetPriority( SPIa_DMA_RX_IRQn
-                        , SPIa_DMA_RX_IRQPriority
-                        , SPIa_DMA_RX_IRQSubPriority
-                        );
-    HAL_NVIC_EnableIRQ( SPIa_DMA_RX_IRQn );
-
-    // Must be lower priority than the above DMA
-    HAL_NVIC_SetPriority( SPIa_IRQn
-                        , SPIa_IRQPriority
-                        , SPIa_IRQSubPriority
-                        );
-    HAL_NVIC_EnableIRQ( SPIa_IRQn );
-}
-
-void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
-{
-    static DMA_HandleTypeDef hdma_rx;
-    static DMA_HandleTypeDef hdma_tx;
-
-    SPIa_FORCE_RESET();
-    SPIa_RELEASE_RESET();
-
-    HAL_GPIO_DeInit(SPIa_SCK_GPIO_PORT, SPIa_SCK_PIN);
-    HAL_GPIO_DeInit(SPIa_MISO_GPIO_PORT, SPIa_MISO_PIN);
-    HAL_GPIO_DeInit(SPIa_MOSI_GPIO_PORT, SPIa_MOSI_PIN);
-    HAL_GPIO_DeInit(SPIa_NSS_GPIO_PORT, SPIa_NSS_PIN);
-
-    HAL_DMA_DeInit(&hdma_tx);
-    HAL_DMA_DeInit(&hdma_rx);
-
-    HAL_NVIC_DisableIRQ(SPIa_DMA_TX_IRQn);
-    HAL_NVIC_DisableIRQ(SPIa_DMA_RX_IRQn);
-    HAL_NVIC_DisableIRQ(SPIa_IRQn);
-}
-
-void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
-{
-    GPIO_InitTypeDef  GPIO_InitStruct;
-    TIMa_MCLK_GPIO_CLK_ENABLE();
-
-    TIMa_CLK_ENABLE();
-
-    GPIO_InitStruct.Pin       = TIMa_MCLK_PIN;
-    GPIO_InitStruct.Pull      = GPIO_PULLUP;
-    GPIO_InitStruct.Speed     = GPIO_SPEED_FAST;
-    //GPIO_InitStruct.Mode      = GPIO_MODE_OUTPUT_PP;
-    GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Alternate = TIMa_MCLK_AF;
-    HAL_GPIO_Init(TIMa_MCLK_GPIO_PORT, &GPIO_InitStruct);
-}
-
-void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
-{
-    TIMa_FORCE_RESET();
-    TIMa_RELEASE_RESET();
-
-    HAL_GPIO_DeInit(TIMa_MCLK_GPIO_PORT, TIMa_MCLK_PIN);
-}
-
-void SPIa_DMA_RX_IRQHandler(void)
-{
-    HAL_DMA_IRQHandler(adc_spi.hdmarx);
-}
-void SPIa_DMA_TX_IRQHandler(void)
-{
-    HAL_DMA_IRQHandler(adc_spi.hdmatx);
-}
-void SPIa_IRQHandler(void)
-{
-    HAL_SPI_IRQHandler(&adc_spi);
-}
diff --git a/ll/ads131.h b/ll/ads131.h
deleted file mode 100644
index c7098617..00000000
--- a/ll/ads131.h
+++ /dev/null
@@ -1,122 +0,0 @@
-#pragma once
-
-#include <stm32f7xx.h>
-#include "interrupts.h" // ADC_IRQPriority
-
-// Defs for MCLK pin, using hardware timer
-#define TIMa                             TIM2
-#define TIMa_CLK_ENABLE()                __HAL_RCC_TIM2_CLK_ENABLE()
-
-#define TIMa_FORCE_RESET()               __HAL_RCC_TIM2_FORCE_RESET()
-#define TIMa_RELEASE_RESET()             __HAL_RCC_TIM2_RELEASE_RESET()
-
-#define TIMa_MCLK_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
-
-#define TIMa_MCLK_PIN                    GPIO_PIN_3
-#define TIMa_MCLK_GPIO_PORT              GPIOA
-#define TIMa_MCLK_AF                     GPIO_AF1_TIM2 // this is PWM AF
-#define TIMa_CHANNEL                     TIM_CHANNEL_4
-
-// Definition for SPIa clock resources
-#define SPIa                             SPI1
-#define SPIa_CLK_ENABLE()                __HAL_RCC_SPI1_CLK_ENABLE()
-#define SPIa_DMAx_CLK_ENABLE()           __HAL_RCC_DMA2_CLK_ENABLE()
-#define SPIa_NSS_GPIO_CLK_ENABLE()       __HAL_RCC_GPIOA_CLK_ENABLE()
-#define SPIa_SCK_GPIO_CLK_ENABLE()       __HAL_RCC_GPIOA_CLK_ENABLE()
-#define SPIa_MISO_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
-#define SPIa_MOSI_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOA_CLK_ENABLE()
-
-#define SPIa_FORCE_RESET()               __HAL_RCC_SPI1_FORCE_RESET()
-#define SPIa_RELEASE_RESET()             __HAL_RCC_SPI1_RELEASE_RESET()
-
-// Definition for SPIa Pins
-#define SPIa_NSS_PIN                     GPIO_PIN_4
-#define SPIa_NSS_GPIO_PORT               GPIOA
-#define SPIa_SCK_PIN                     GPIO_PIN_5
-#define SPIa_SCK_GPIO_PORT               GPIOA
-#define SPIa_SCK_AF                      GPIO_AF5_SPI1
-#define SPIa_MISO_PIN                    GPIO_PIN_6
-#define SPIa_MISO_GPIO_PORT              GPIOA
-#define SPIa_MISO_AF                     GPIO_AF5_SPI1
-#define SPIa_MOSI_PIN                    GPIO_PIN_7
-#define SPIa_MOSI_GPIO_PORT              GPIOA
-#define SPIa_MOSI_AF                     GPIO_AF5_SPI1
-
-#define SPIa_NRST_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOC_CLK_ENABLE()
-#define SPIa_NRST_PIN                    GPIO_PIN_4
-#define SPIa_NRST_GPIO_PORT              GPIOC
-
-// Definition for SPIa's DMA
-#define SPIa_TX_DMA_CHANNEL              DMA_CHANNEL_3
-#define SPIa_TX_DMA_STREAM               DMA2_Stream3
-#define SPIa_RX_DMA_CHANNEL              DMA_CHANNEL_3
-#define SPIa_RX_DMA_STREAM               DMA2_Stream0
-
-// Definition for SPIa's NVIC
-#define SPIa_IRQn                        SPI1_IRQn
-#define SPIa_IRQHandler                  SPI1_IRQHandler
-#define SPIa_DMA_TX_IRQn                 DMA2_Stream3_IRQn
-#define SPIa_DMA_RX_IRQn                 DMA2_Stream0_IRQn
-#define SPIa_DMA_TX_IRQHandler           DMA2_Stream3_IRQHandler
-#define SPIa_DMA_RX_IRQHandler           DMA2_Stream0_IRQHandler
-
-#define SPIa_IRQPriority             ADC_IRQPriority
-#define SPIa_IRQSubPriority          2
-#define SPIa_DMA_TX_IRQPriority      ADC_IRQPriority
-#define SPIa_DMA_TX_IRQSubPriority   1
-#define SPIa_DMA_RX_IRQPriority      ADC_IRQPriority
-#define SPIa_DMA_RX_IRQSubPriority   0
-
-// ADS131 commands
-#define ADS_READY   0xFF02
-
-#define ADS_NULL    0x0
-#define ADS_RESET   0x0011
-#define ADS_STANDBY 0x0022
-#define ADS_WAKEUP  0x0033
-#define ADS_LOCK    0x0555
-#define ADS_UNLOCK  0x0655
-//#define ADS_UNLOCK  0x5506
-
-#define ADS_READ_REG  0x20
-#define ADS_WRITE_REG 0x40
-
-// ads131 status registers
-#define ADS_STAT_1    0x02
-#define ADS_STAT_P    0x03
-#define ADS_STAT_N    0x04
-#define ADS_STAT_S    0x05
-#define ADS_ERROR_CNT 0x06
-#define ADS_STAT_M2   0x07
-
-// ads131 user config registers
-#define ADS_A_SYS_CFG 0x0B
-#define ADS_D_SYS_CFG 0x0C
-#define ADS_CLK1      0x0D
-#define ADS_CLK2      0x0E
-#define ADS_ADC_ENA   0x0F
-
-#define ADS_DATAWORDSIZE 0x2 // 16bit, pin M1 floats
-
-void ADC_Init( uint16_t bsize, uint8_t chan_count, int timer_ix );
-
-//int32_t
-uint16_t ADC_GetU16( uint8_t channel );
-void ADC_UnpickleBlock( float*   unpickled
-                      , uint16_t bsize
-                      );
-float ADC_GetValue( uint8_t channel );
-
-void ADC_CalibrateScalar( uint8_t channel, float scale );
-void ADC_CalibrateShift( uint8_t channel, float volts );
-
-void SPIa_DMA_RX_IRQHandler(void);
-void SPIa_DMA_TX_IRQHandler(void);
-void SPIa_IRQHandler(void);
-
-void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
-void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
-
-void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
-void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
diff --git a/ll/dac108.c b/ll/dac108.c
new file mode 100644
index 00000000..67f05961
--- /dev/null
+++ b/ll/dac108.c
@@ -0,0 +1,339 @@
+#include "dac108.h"
+
+#include <stdio.h>
+#include "stdlib.h" // malloc()
+#include "debug_pin.h"
+
+#include "adda.h"   // ADDA_BlockProcess()
+#include "wrMath.h" // lim_f()
+
+
+// #include "tp.h" // debugging
+
+#define DAC_BUFFER_COUNT 2 // ping-pong
+
+// pointer to the malloc()d buffer from DAC_Init()
+uint16_t  samp_count = 0;
+uint32_t* samples = NULL;
+
+// #define DAC_ZERO_VOLTS      ((uint16_t)(((uint32_t)0xFFFF * 2)/3))
+// #define DAC_V_TO_U16        ((float)(65535.0 / 15.0))
+#define DAC_ZERO_VOLTS      ((uint16_t)0x7FF)
+#define DAC_V_TO_U16        ((float)(4095.0 / 10.0))
+#define DAC_CHANNELSS 8
+float dac_calibrated_offset[DAC_CHANNELSS];
+float dac_calibrated_scalar[DAC_CHANNELSS];
+
+static const uint16_t write_through_mode = 0b1001000000000000;
+
+
+
+#define _DMA_PDATA_ALIGN DMA_PDATAALIGN_WORD
+#define _DMA_MDATA_ALIGN DMA_MDATAALIGN_WORD
+#define _DMA_FIFO_THRESH DMA_FIFO_THRESHOLD_HALFFULL
+#define _T_SAMPLES uint32_t*
+#define _SAI_DATASIZE SAI_DATASIZE_16
+#define _SAI_FIRSTBIT SAI_FIRSTBIT_MSB
+#define _SAI_CLOCKSTROBE SAI_CLOCKSTROBING_RISINGEDGE
+
+#define _FRAME_LENGTH 17
+#define _FRAME_ACTIVE_LENGTH 1
+#define _FRAME_FSDEFINTION SAI_FS_STARTFRAME
+#define _FRAME_FSPOLARITY SAI_FS_ACTIVE_HIGH
+#define _FRAME_FSOFFSET SAI_FS_BEFOREFIRSTBIT
+
+#define _SLOT_FIRSTBITOFFSET 0
+#define _SLOT_SIZE SAI_SLOTSIZE_16B
+#define _SLOT_NUMBER 1
+#define _SLOT_ACTIVE SAI_SLOTACTIVE_0 
+
+
+
+
+
+static void sai_start_transmit(uint32_t* hwords, uint16_t count);
+static void sai_init(void);
+
+void DAC_Init(uint16_t bsize, uint8_t chan_count){
+    sai_init();
+
+    // Create the sample buffer for DMA transfer
+    samp_count = DAC_BUFFER_COUNT * bsize * chan_count; // 512
+    printf("samp_count %x\n\r", samp_count);
+    samples = malloc( sizeof(uint16_t) * samp_count ); // 1k
+    if(samples == NULL){ printf("!DAC_buffer\n"); }
+    // for( int i=0; i<samp_count; i++ ){ samples[i] = 0; } // unnecessary
+
+    for( int j=0; j<DAC_CHANNELSS; j++ ){
+        dac_calibrated_offset[j] = 0.0;
+        dac_calibrated_scalar[j] = DAC_V_TO_U16;
+    }
+}
+
+void DAC_Start(void){
+    for(int i=0; i<samp_count; i++){ // double-buffered
+        // NB: we add 1 to i, so we start the loop on second channel
+        // int chan_mod = (i+1) & (8-1); // channel modulo 8, running 1-7, then 0.
+        // if(chan_mod == 0){ // chan 0
+        //     samples[i] = 0b1011 << 12; // sets chan 1 & updates all outputs
+        // } else { // chans 1-7
+        //     samples[i] = chan_mod<<12; // sets channel select bits
+        // }
+        samples[i] = write_through_mode;
+    }
+    sai_start_transmit(samples, samp_count>>1);
+}
+
+void DAC_CalibrateScalar( uint8_t channel, float scale ){
+    // dac_calibrated_scalar[channel] = DAC_V_TO_U16 * scale;
+}
+
+void DAC_CalibrateOffset( uint8_t channel, float volts ){
+    // dac_calibrated_offset[channel] = volts;
+}
+
+uint16_t lim_i32_u12( int32_t v ){
+    return (uint16_t)((v > 0xfff) ? 0xfff : (v < 0) ? 0 : v);
+}
+
+/* Does all the work converting a generic representation into serial packets
+ * Convert floats (representing volts) to u16 representation
+ * Interleave a block of each channel into a stream
+ * */
+// unpickled_data is arranged as blocks of bsize, * chan count
+// pickled data needs to be interleaved sample-by-sample across all channels
+void DAC_PickleBlock( uint32_t* dac_pickle_ptr
+                    , float*    unpickled_data
+                    , uint16_t  bsize
+                    )
+{
+    // TODO calibration (maybe not)
+    // for( uint8_t j=0; j<4; j++ ){
+    //     add_vf_f( &(unpickled_data[j*bsize])
+    //             , dac_calibrated_offset[j]
+    //             , &(unpickled_data[j*bsize])
+    //             , bsize
+    //             );
+    // }
+    for( int j=0; j<ADDA_DAC_CHAN_COUNT; j++ ){
+        mul_vf_f( &(unpickled_data[j*bsize])
+                , dac_calibrated_scalar[j] // scale volts up to u12. 409.5 per octave
+                , bsize
+                );
+    }
+
+// TESTING: just create a stair step of outputs
+    /*
+    for( int i=0; i<bsize; i++){
+        for( int j=0; j<ADDA_DAC_CHAN_COUNT; j++ ){
+            if((i==0) && (j==0 | j==1)){
+                // dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 0b11111111;
+                dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 0;
+            } else if((i==1) && (j==0)){
+                // dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 0b10000001;
+                dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 0b1000000000000001;
+            } else {
+                dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 0;
+            }
+            // dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] = 1 << j; // add channel tag
+            // dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] &= 0xfff; // clip any overage
+
+            // int b_chan = i % ADDA_DAC_CHAN_COUNT;
+            // dac_pickle_ptr[j+i*ADDA_DAC_CHAN_COUNT] |= b_chan << 12; // add channel tag
+        }
+    }
+
+*/
+
+    // +/-5v lfo -> +/-2048.f
+    // uint16_t vv = lim_i32_u12((int32_t)(DAC_ZERO_VOLTS - unpickled_data[0]));
+    // vv |= (7<<12);
+    // uint16_t* dpp = (uint16_t*)dac_pickle_ptr;
+    for(int i=0; i<(ADDA_DAC_CHAN_COUNT * bsize); i++){
+        // 0chan + 0
+        // 1chan + 0
+        // ...
+        // 0chan + 1
+        // ? = weird scan through the buffer to interleave channels
+        int b_chan = i % ADDA_DAC_CHAN_COUNT;
+        int b_samp = i / ADDA_DAC_CHAN_COUNT;
+        // DAC_ZERO_VOLTS = 0x7ff (2047)
+        // dac_pickle_ptr[i] = vv | (b_chan << 12);
+        // dac_pickle_ptr[i] = vv;
+        dac_pickle_ptr[i] = lim_i32_u12((int32_t)(DAC_ZERO_VOLTS - unpickled_data[b_samp + bsize*b_chan]));
+        dac_pickle_ptr[i] |= b_chan << 12;
+        // dac_pickle_ptr[i] <<= 16;
+        // *dpp = lim_i32_u12((int32_t)(DAC_ZERO_VOLTS - unpickled_data[b_samp + bsize*b_chan]));
+        // *dpp |= b_chan << 12;
+        // dpp++;
+    }
+}
+
+static SAI_HandleTypeDef hsai_a;
+static DMA_HandleTypeDef hdma_tx_a;
+
+
+
+static void sai_init(void){
+
+    RCC_PeriphCLKInitTypeDef rcc;
+    rcc.PeriphClockSelection    = RCC_PERIPHCLK_SAI1;
+    rcc.Sai1ClockSelection      = RCC_SAI1CLKSOURCE_PLLSAI;
+
+    // here we configure for 3.072MHz
+    // ie 8 channels, 17bits, 22.5kHz sample rate
+    // rcc.PLLSAI.PLLSAIN          = 384;
+    // rcc.PLLSAI.PLLSAIN          = 192;
+    rcc.PLLSAI.PLLSAIN          = 96;
+    rcc.PLLSAI.PLLSAIQ          = 5;
+    rcc.PLLSAIDivQ              = 25;
+    // see @ciel/tools/sai_pll_calculator.lua to configure
+
+    HAL_RCCEx_PeriphCLKConfig(&rcc);
+
+    // Initialize SAI
+    __HAL_SAI_RESET_HANDLE_STATE(&hsai_a);
+
+    // block A
+    hsai_a.Instance = SAI1_Block_A; // TODO follow instance
+    __HAL_SAI_DISABLE(&hsai_a);
+    hsai_a.Init.AudioMode         = SAI_MODEMASTER_TX;
+    hsai_a.Init.Synchro           = SAI_ASYNCHRONOUS;
+    hsai_a.Init.SynchroExt        = SAI_SYNCEXT_DISABLE;
+    hsai_a.Init.OutputDrive       = SAI_OUTPUTDRIVE_ENABLE;
+    hsai_a.Init.NoDivider         = SAI_MASTERDIVIDER_DISABLE;
+    hsai_a.Init.FIFOThreshold     = SAI_FIFOTHRESHOLD_1QF;
+    hsai_a.Init.AudioFrequency    = SAI_AUDIO_FREQUENCY_48K; // _48K or _96K or _192K
+    hsai_a.Init.Protocol          = SAI_FREE_PROTOCOL;
+    hsai_a.Init.DataSize          = _SAI_DATASIZE;
+    hsai_a.Init.FirstBit          = _SAI_FIRSTBIT;
+    hsai_a.Init.ClockStrobing     = _SAI_CLOCKSTROBE; // CONFIRM
+
+    hsai_a.FrameInit.FrameLength          = _FRAME_LENGTH; // ie data length plus 1 bit for FS sync pulse
+    hsai_a.FrameInit.ActiveFrameLength    = _FRAME_ACTIVE_LENGTH;
+    hsai_a.FrameInit.FSDefinition         = _FRAME_FSDEFINTION;
+    hsai_a.FrameInit.FSPolarity           = _FRAME_FSPOLARITY;
+    hsai_a.FrameInit.FSOffset             = _FRAME_FSOFFSET; // SAI_FS_FIRSTBIT
+
+    hsai_a.SlotInit.FirstBitOffset    = _SLOT_FIRSTBITOFFSET; // maybe 1?
+    hsai_a.SlotInit.SlotSize          = _SLOT_SIZE;
+    hsai_a.SlotInit.SlotNumber        = _SLOT_NUMBER; // ie. only 1 chip in sequence
+    hsai_a.SlotInit.SlotActive        = _SLOT_ACTIVE; // each DAC chan needs it's own frame!
+
+    if(HAL_SAI_Init(&hsai_a)){
+        printf("sai init failed\n\r");
+        return;
+    }
+
+    // Enable SAI to generate clock used by audio driver
+    __HAL_SAI_ENABLE(&hsai_a);
+}
+
+void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai)
+{
+    GPIO_InitTypeDef  GPIO_Init;
+    GPIO_Init.Mode  = GPIO_MODE_AF_PP;
+    GPIO_Init.Pull  = GPIO_PULLUP;
+    GPIO_Init.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+    __HAL_RCC_DMA2_CLK_ENABLE();
+    __HAL_RCC_SAI1_CLK_ENABLE(); // RCC
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    GPIO_Init.Alternate     = GPIO_AF6_SAI1;
+    GPIO_Init.Pin           = GPIO_PIN_4;
+    HAL_GPIO_Init(GPIOE, &GPIO_Init);
+    GPIO_Init.Alternate     = GPIO_AF6_SAI1;
+    GPIO_Init.Pin           = GPIO_PIN_5;
+    HAL_GPIO_Init(GPIOE, &GPIO_Init);
+    GPIO_Init.Alternate     = GPIO_AF6_SAI1;
+    GPIO_Init.Pin           = GPIO_PIN_6;
+    HAL_GPIO_Init(GPIOE, &GPIO_Init);
+
+    // Configure DMA used for SAI1_A
+    // d2.s3.c0 // alternates: 2.1.0, 2.3.0, 2.6.10
+    hdma_tx_a.Init.Channel                = DMA_CHANNEL_0;
+    hdma_tx_a.Init.Direction              = DMA_MEMORY_TO_PERIPH;
+    hdma_tx_a.Init.PeriphInc              = DMA_PINC_DISABLE;
+    hdma_tx_a.Init.MemInc                 = DMA_MINC_ENABLE;
+    hdma_tx_a.Init.PeriphDataAlignment    = _DMA_PDATA_ALIGN;
+    // hdma_tx_a.Init.MemDataAlignment       = DMA_MDATAALIGN_HALFWORD;
+    hdma_tx_a.Init.MemDataAlignment       = _DMA_MDATA_ALIGN;
+    hdma_tx_a.Init.Mode                   = DMA_CIRCULAR;
+    hdma_tx_a.Init.Priority               = DMA_PRIORITY_HIGH;
+    hdma_tx_a.Init.FIFOMode               = DMA_FIFOMODE_DISABLE;
+    hdma_tx_a.Init.FIFOThreshold          = _DMA_FIFO_THRESH;
+    hdma_tx_a.Init.MemBurst               = DMA_MBURST_SINGLE;
+    hdma_tx_a.Init.PeriphBurst            = DMA_PBURST_SINGLE;
+
+    hdma_tx_a.Instance                    = DMA2_Stream3;
+
+    // Bidirectionally link the DMA & SAI handles
+    __HAL_LINKDMA(hsai, hdmatx, hdma_tx_a);
+
+    // Deinitialize the Stream for new transfer
+    HAL_DMA_DeInit(&hdma_tx_a);
+
+    // Configure the DMA Stream
+    if( HAL_OK != HAL_DMA_Init(&hdma_tx_a) ){
+        // debug(&debug, "HAL_DMA_Init failed");
+        return;
+    }
+
+    // Codec request triggers transfer & new frame calc
+    HAL_NVIC_SetPriority( DMA2_Stream3_IRQn
+                        , DAC_IRQPriority
+                        , 1
+                        );
+    HAL_NVIC_EnableIRQ( DMA2_Stream3_IRQn );
+}
+
+void sai_start_transmit(_T_SAMPLES hwords, uint16_t count){
+    if(HAL_SAI_Transmit_DMA(&hsai_a, (uint8_t*)hwords, count)){
+        printf("sai transmit fail.\n\r");
+    }
+}
+
+
+
+// static int status = 0;
+// DMA triggered by codec requesting more ADC!
+void DMA2_Stream3_IRQHandler(void){
+    // status ^= 1;
+    // TP_debug_led(0, status);
+    HAL_DMA_IRQHandler(&hdma_tx_a);
+    if(hdma_tx_a.ErrorCode != HAL_OK){
+        // printf("sai dma err: 0x%0x\n\r", hdma_tx_a.ErrorCode);
+        printf("sai dma err\n\r");
+    }
+}
+
+static void callback(int offset){
+    // HAL_NVIC_DisableIRQ( DMA2_Stream3_IRQn );
+    // int b_size2 = b_size * 2;
+    // int offset2 = offset * b_size2;
+    // float in[b_size2];
+    // float out[b_size2];
+    // codec_to_floats( in, &in[b_size], &inBuff[offset2], b_size );
+// FIXME ONLY ONE OF THE NEXT 2 FUNS
+
+    // TP_debug_led(1, 1);
+    ADDA_BlockProcess( (offset==1) ? &samples[samp_count>>1] : samples );
+
+
+
+
+
+    // (*block_process_fn)( out
+    //                    , in // treat ins as zeroes (unused)
+    //                    , b_size
+    //                    );
+    // floats_to_codec( &outBuff[offset2], out, b_size );
+    // HAL_NVIC_EnableIRQ( DMA2_Stream3_IRQn );
+}
+
+void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai){ callback(0); }
+void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai){ callback(1); }
+void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai){
+    // printf("sai error 0x%x\n\r", hsai->ErrorCode);
+    printf("sai error");
+}
diff --git a/ll/dac108.h b/ll/dac108.h
new file mode 100644
index 00000000..88f3f983
--- /dev/null
+++ b/ll/dac108.h
@@ -0,0 +1,22 @@
+#pragma once
+
+#include <stm32f7xx.h>
+#include "interrupts.h" // DAC_IRQPriority
+
+void DAC_Init( uint16_t bsize, uint8_t chan_count );
+void DAC_Start(void);
+
+void DAC_CalibrateScalar( uint8_t channel, float scale );
+void DAC_CalibrateOffset( uint8_t channel, float volts );
+void DAC_PickleBlock( uint32_t* dac_pickle_ptr
+                    , float*    unpickled_data
+                    , uint16_t  bsize
+                    );
+
+// new
+void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
+
+void DMA2_Stream3_IRQHandler(void);
+void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
+void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
+void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
diff --git a/ll/dac8565.c b/ll/dac8565.c
deleted file mode 100644
index a8e8cf4a..00000000
--- a/ll/dac8565.c
+++ /dev/null
@@ -1,282 +0,0 @@
-#include "dac8565.h"
-
-#include <stdio.h>
-#include "stdlib.h" // malloc()
-#include "debug_pin.h"
-
-#include "adda.h"   // ADDA_BlockProcess()
-#include "wrMath.h" // lim_f()
-
-#define DAC_BUFFER_COUNT 2 // ping-pong
-
-I2S_HandleTypeDef dac_i2s;
-
-// pointer to the malloc()d buffer from DAC_Init()
-uint32_t  samp_count = 0;
-uint32_t* samples = NULL;
-
-#define DAC_ZERO_VOLTS      ((uint16_t)(((uint32_t)0xFFFF * 2)/3))
-#define DAC_V_TO_U16        ((float)(65535.0 / 15.0))
-#define DAC_CHANNELSS 4
-float dac_calibrated_offset[DAC_CHANNELSS];
-float dac_calibrated_scalar[DAC_CHANNELSS];
-
-void DAC_Init( uint16_t bsize, uint8_t chan_count )
-{
-    // Create the sample buffer for DMA transfer
-    samp_count = DAC_BUFFER_COUNT * bsize * chan_count;
-    samples = malloc( sizeof(uint32_t) * samp_count );
-    for( int i=0; i<samp_count; i++ ){ samples[i] = 0; } // unnecessary
-    if(samples == NULL){ printf("DAC_buffer\n"); }
-
-    for( int j=0; j<DAC_CHANNELSS; j++ ){
-        dac_calibrated_offset[j] = 0.0;
-        dac_calibrated_scalar[j] = DAC_V_TO_U16;
-    }
-
-    // Set the SPI parameters
-    dac_i2s.Instance          = I2Sx;
-    dac_i2s.Init.Mode         = I2S_MODE_MASTER_TX;
-    dac_i2s.Init.Standard     = I2S_STANDARD_PCM_SHORT;
-    dac_i2s.Init.DataFormat   = I2S_DATAFORMAT_24B;
-    dac_i2s.Init.MCLKOutput   = I2S_MCLKOUTPUT_ENABLE;
-    dac_i2s.Init.AudioFreq    = I2S_AUDIOFREQ_192K; // manipulates mclk to hit 48kHz on 4 chans
-    dac_i2s.Init.CPOL         = I2S_CPOL_LOW;
-    dac_i2s.Init.ClockSource  = I2S_CLOCK_PLL;
-
-    if(HAL_I2S_Init(&dac_i2s) != HAL_OK){ printf("i2s_init\n"); }
-
-    // NRST & NSS both high
-    HAL_GPIO_WritePin( I2Sx_NRST_GPIO_PORT, I2Sx_NRST_PIN, 0 );
-    volatile uint32_t t=10000; while(t){t--;}
-    HAL_GPIO_WritePin( I2Sx_NRST_GPIO_PORT, I2Sx_NRST_PIN, 1 );
-}
-
-/* Initialize the DMA buffer to contain required metadata
- * Each channel is initialized with its relevant SPI command
- * The last channel latches all the new values to the outputs
- *
- * */
-void DAC_Start(void)
-{
-    // prepare SPI packet metadata
-    uint32_t* dbuf = samples;
-    for( uint16_t i=0; i<samp_count; i++ ){
-        uint8_t* addr_ptr = ((uint8_t*)dbuf) + 1;
-        *addr_ptr = (i%4 == 3)
-                        ? DAC8565_SET_AND_UPDATE | 3 << 1
-                        : DAC8565_PREP_ONE | (i%4) << 1;
-        dbuf++;
-    }
-
-    // set all channels to 0v (0xAAAA)
-    dbuf = samples;
-    for( uint16_t i=0; i<samp_count; i++ ){
-        uint8_t* addr_ptr = ((uint8_t*)dbuf) + 0;
-        *addr_ptr = 0xAA;
-        addr_ptr += 3;
-        *addr_ptr = 0xAA;
-        dbuf++;
-    }
-    // begin i2s transmission
-    int error;
-    BLOCK_IRQS(
-        error = HAL_I2S_Transmit_DMA( &dac_i2s
-                            , (uint16_t*)samples
-                            , samp_count
-                            );
-    );
-    if(error){ printf("i2s failed to start\n"); }
-}
-
-void DAC_CalibrateScalar( uint8_t channel, float scale )
-{
-    dac_calibrated_scalar[channel] = DAC_V_TO_U16 * scale;
-}
-
-void DAC_CalibrateOffset( uint8_t channel, float volts )
-{
-    dac_calibrated_offset[channel] = volts;
-}
-
-int32_t lim_i32_u16( int32_t v )
-{
-    return (v > (int32_t)(uint16_t)0xFFFF) ? 0xFFFF : (v < (int32_t)0) ? 0 : v;
-}
-
-/* Does all the work converting a generic representation into serial packets
- * Convert floats (representing volts) to u16 representation
- * Interleave a block of each channel into a stream
- * */
-void DAC_PickleBlock( uint32_t* dac_pickle_ptr
-                    , float*    unpickled_data
-                    , uint16_t  bsize
-                    )
-{
-    for( uint8_t j=0; j<4; j++ ){
-        add_vf_f( &(unpickled_data[j*bsize])
-                , dac_calibrated_offset[j]
-                , &(unpickled_data[j*bsize])
-                , bsize
-                );
-    }
-    for( uint8_t j=0; j<4; j++ ){
-        mul_vf_f( &(unpickled_data[j*bsize])
-                , dac_calibrated_scalar[j] // scale volts up to u16
-                , bsize
-                );
-    }
-
-    uint16_t usixteens[bsize * 4];
-    uint16_t* usixp = usixteens;
-
-    for( uint16_t i=0; i<bsize; i++ ){
-        for( uint8_t j=0; j<4; j++ ){
-            *usixp++ = (uint16_t)lim_i32_u16( DAC_ZERO_VOLTS
-                                   //- (int32_t)(*u[j]++)
-                                   - (int32_t)(unpickled_data[i+j*bsize])
-                                 );
-        }
-    }
-
-    uint8_t* insert_p = (uint8_t*)dac_pickle_ptr;
-    usixp = usixteens;
-
-    for( uint16_t i=0; i<(bsize*4); i++ ){
-        *insert_p = *usixp>>8;
-        insert_p += 3;
-        *insert_p++ = *usixp++ & 0xFF;
-    }
-}
-
-
-
-// This wraps the (un)pickling functions in ll/addac.c
-void HAL_I2S_TxHalfCpltCallback( I2S_HandleTypeDef *hi2s )
-{
-    Debug_Pin_Set(1);
-    ADDA_BlockProcess( samples );
-    Debug_Pin_Set(0);
-}
-void HAL_I2S_TxCpltCallback( I2S_HandleTypeDef *hi2s )
-{
-    Debug_Pin_Set(1);
-    ADDA_BlockProcess( &samples[samp_count/2] );
-    Debug_Pin_Set(0);
-}
-void HAL_I2S_ErrorCallback( I2S_HandleTypeDef *hi2s )
-{
-    printf("i2s_tx_error\n");
-}
-
-
-// Driver Config
-void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
-{
-    // I2S PLL Config
-    RCC_PeriphCLKInitTypeDef RCC_ExCLKInitStruct;
-
-    // PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN/PLLM)
-    // I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR
-    RCC_ExCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
-    RCC_ExCLKInitStruct.I2sClockSelection = RCC_I2SCLKSOURCE_PLLI2S;
-    RCC_ExCLKInitStruct.PLLI2S.PLLI2SN = 384; // mul factor: 50~432
-    RCC_ExCLKInitStruct.PLLI2S.PLLI2SR = 2; // div factor: 2~7
-    HAL_RCCEx_PeriphCLKConfig(&RCC_ExCLKInitStruct);
-
-    // SPI/I2S & DMA
-    I2Sx_CLK_ENABLE();
-    I2Sx_DMAx_CLK_ENABLE();
-
-    // GPIO pins
-    I2Sx_NSS_GPIO_CLK_ENABLE();
-    I2Sx_SCK_GPIO_CLK_ENABLE();
-    I2Sx_MOSI_GPIO_CLK_ENABLE();
-    I2Sx_NRST_GPIO_CLK_ENABLE();
-
-    GPIO_InitTypeDef  GPIO_InitStruct;
-
-    GPIO_InitStruct.Pin       = I2Sx_SCK_PIN;
-    GPIO_InitStruct.Speed     = GPIO_SPEED_FAST;
-    GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-    GPIO_InitStruct.Alternate = I2Sx_SCK_AF;
-    HAL_GPIO_Init(I2Sx_SCK_GPIO_PORT, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin       = I2Sx_MOSI_PIN;
-    GPIO_InitStruct.Alternate = I2Sx_MOSI_AF;
-    HAL_GPIO_Init(I2Sx_MOSI_GPIO_PORT, &GPIO_InitStruct);
-
-    GPIO_InitStruct.Pin       = I2Sx_NSS_PIN;
-    GPIO_InitStruct.Alternate = I2Sx_NSS_AF;
-    HAL_GPIO_Init(I2Sx_NSS_GPIO_PORT, &GPIO_InitStruct);
-
-    // NRST handled manually
-    GPIO_InitStruct.Pin       = I2Sx_NRST_PIN;
-    GPIO_InitStruct.Pull      = GPIO_PULLUP;
-    GPIO_InitStruct.Mode      = GPIO_MODE_OUTPUT_PP;
-    HAL_GPIO_Init(I2Sx_NRST_GPIO_PORT, &GPIO_InitStruct);
-
-    // DMA Streams
-    static DMA_HandleTypeDef hdma_tx;
-
-    hdma_tx.Instance                 = I2Sx_TX_DMA_STREAM;
-
-    hdma_tx.Init.Channel             = I2Sx_TX_DMA_CHANNEL;
-    hdma_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
-    hdma_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
-    hdma_tx.Init.MemInc              = DMA_MINC_ENABLE;
-    hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
-    hdma_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_WORD;
-    hdma_tx.Init.Mode                = DMA_CIRCULAR;
-    hdma_tx.Init.Priority            = DMA_PRIORITY_LOW;
-    hdma_tx.Init.FIFOMode            = DMA_FIFOMODE_DISABLE;
-    hdma_tx.Init.FIFOThreshold       = DMA_FIFO_THRESHOLD_FULL;
-    hdma_tx.Init.MemBurst            = DMA_MBURST_INC4;
-    hdma_tx.Init.PeriphBurst         = DMA_PBURST_INC4;
-
-    HAL_DMA_Init(&hdma_tx);
-
-    // Associate I2S w/ DMA
-    __HAL_LINKDMA(hi2s, hdmatx, hdma_tx);
-
-    // DMA Priority (should be below IO, but above main process)
-    HAL_NVIC_SetPriority( I2Sx_DMA_TX_IRQn
-                        , I2Sx_DMA_TX_IRQPriority
-                        , I2Sx_DMA_TX_IRQSubPriority
-                        );
-    HAL_NVIC_EnableIRQ( I2Sx_DMA_TX_IRQn );
-
-    // Must be lower priority than the above DMA
-    HAL_NVIC_SetPriority( I2Sx_IRQn
-                        , I2Sx_IRQPriority
-                        , I2Sx_IRQSubPriority
-                        );
-    HAL_NVIC_EnableIRQ( I2Sx_IRQn );
-}
-
-void DAC_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
-{
-
-  static DMA_HandleTypeDef hdma_tx;
-
-  I2Sx_FORCE_RESET();
-  I2Sx_RELEASE_RESET();
-
-  HAL_GPIO_DeInit(I2Sx_NSS_GPIO_PORT,  I2Sx_NSS_PIN);
-  HAL_GPIO_DeInit(I2Sx_SCK_GPIO_PORT,  I2Sx_SCK_PIN);
-  HAL_GPIO_DeInit(I2Sx_MOSI_GPIO_PORT, I2Sx_MOSI_PIN);
-
-  HAL_DMA_DeInit(&hdma_tx);
-
-  HAL_NVIC_DisableIRQ(I2Sx_DMA_TX_IRQn);
-  HAL_NVIC_DisableIRQ(I2Sx_IRQn);
-}
-
-void I2Sx_DMA_TX_IRQHandler(void)
-{
-    HAL_DMA_IRQHandler(dac_i2s.hdmatx);
-}
-void I2Sx_IRQHandler(void)
-{
-    HAL_I2S_IRQHandler(&dac_i2s);
-}
diff --git a/ll/dac8565.h b/ll/dac8565.h
deleted file mode 100644
index 9a7adebe..00000000
--- a/ll/dac8565.h
+++ /dev/null
@@ -1,71 +0,0 @@
-#pragma once
-
-#include <stm32f7xx.h>
-#include "interrupts.h" // DAC_IRQPriority
-
-// Defn for I2S
-#define I2Sx                             SPI2
-#define I2Sx_CLK_ENABLE()                __HAL_RCC_SPI2_CLK_ENABLE()
-#define I2Sx_DMAx_CLK_ENABLE()           __HAL_RCC_DMA1_CLK_ENABLE()
-#define I2Sx_NSS_GPIO_CLK_ENABLE()       __HAL_RCC_GPIOB_CLK_ENABLE()
-#define I2Sx_SCK_GPIO_CLK_ENABLE()       __HAL_RCC_GPIOB_CLK_ENABLE()
-#define I2Sx_MOSI_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOB_CLK_ENABLE()
-#define I2Sx_NRST_GPIO_CLK_ENABLE()      __HAL_RCC_GPIOB_CLK_ENABLE()
-
-#define I2Sx_FORCE_RESET()               __HAL_RCC_SPI2_FORCE_RESET()
-#define I2Sx_RELEASE_RESET()             __HAL_RCC_SPI2_RELEASE_RESET()
-
-// Definition for I2Sx Pins
-#define I2Sx_NSS_PIN                     GPIO_PIN_12
-#define I2Sx_NSS_GPIO_PORT               GPIOB
-#define I2Sx_NSS_AF                      GPIO_AF5_SPI2
-#define I2Sx_SCK_PIN                     GPIO_PIN_13
-#define I2Sx_SCK_GPIO_PORT               GPIOB
-#define I2Sx_SCK_AF                      GPIO_AF5_SPI2
-#define I2Sx_MOSI_PIN                    GPIO_PIN_15
-#define I2Sx_MOSI_GPIO_PORT              GPIOB
-#define I2Sx_MOSI_AF                     GPIO_AF5_SPI2
-#define I2Sx_NRST_PIN                    GPIO_PIN_14
-#define I2Sx_NRST_GPIO_PORT              GPIOB
-
-// Definition for SPId's DMA
-#define I2Sx_TX_DMA_CHANNEL              DMA_CHANNEL_0
-#define I2Sx_TX_DMA_STREAM               DMA1_Stream4
-
-// Definition for SPId's NVIC
-#define I2Sx_IRQn                        SPI2_IRQn
-#define I2Sx_IRQHandler                  SPI2_IRQHandler
-#define I2Sx_DMA_TX_IRQn                 DMA1_Stream4_IRQn
-#define I2Sx_DMA_TX_IRQHandler           DMA1_Stream4_IRQHandler
-
-#define I2Sx_IRQPriority             DAC_IRQPriority
-#define I2Sx_IRQSubPriority          2
-#define I2Sx_DMA_TX_IRQPriority      DAC_IRQPriority
-#define I2Sx_DMA_TX_IRQSubPriority   1
-
-// dac8565 defines
-#define DAC8565_SET_ONE        ((uint8_t)0b00010000)
-#define DAC8565_PREP_ONE       ((uint8_t)0x0)
-#define DAC8565_SET_AND_UPDATE ((uint8_t)0b00100000)
-#define DAC8565_SET_ALL        ((uint8_t)0b00110100)
-#define DAC8565_REFRESH_ALL    ((uint8_t)0b00110000)
-
-void DAC_Init( uint16_t bsize, uint8_t chan_count );
-void DAC_Start(void);
-
-void DAC_CalibrateScalar( uint8_t channel, float scale );
-void DAC_CalibrateOffset( uint8_t channel, float volts );
-void DAC_PickleBlock( uint32_t* dac_pickle_ptr
-                    , float*    unpickled_data
-                    , uint16_t  bsize
-                    );
-
-void I2Sx_DMA_TX_IRQHandler(void);
-void I2Sx_IRQHandler(void);
-
-void HAL_I2S_TxCpltCallback( I2S_HandleTypeDef *hi2s );
-void HAL_I2S_TxHalfCpltCallback( I2S_HandleTypeDef *hi2s );
-void HAL_I2S_ErrorCallback( I2S_HandleTypeDef *hi2s );
-
-void DAC_I2S_MspInit(I2S_HandleTypeDef *hi2s);
-void DAC_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
diff --git a/ll/debug_pin.c b/ll/debug_pin.c
index 9af72426..4179a24b 100644
--- a/ll/debug_pin.c
+++ b/ll/debug_pin.c
@@ -5,16 +5,17 @@ void Debug_Pin_Init(void)
 {
     DBG_P_RCC_ENABLE();
 
-    GPIO_InitStruct.Pin   = DBG_P_PIN;
+    GPIO_InitStruct.Pin   = DBG_P_PIN_B | DBG_P_PIN_R | DBG_P_PIN_G;
     GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
     GPIO_InitStruct.Pull  = GPIO_NOPULL;
     GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
     HAL_GPIO_Init(DBG_P_GPIO, &GPIO_InitStruct);
 }
 
-void Debug_Pin_Set( uint8_t state )
-{
-    BLOCK_IRQS(
-        HAL_GPIO_WritePin( DBG_P_GPIO, DBG_P_PIN, state );
-    );
+void Debug_Pin_Set(int chan, int state ){
+    switch(chan){
+        case 0: HAL_GPIO_WritePin( DBG_P_GPIO, DBG_P_PIN_R, state ); break;
+        case 1: HAL_GPIO_WritePin( DBG_P_GPIO, DBG_P_PIN_G, state ); break;
+        case 2: HAL_GPIO_WritePin( DBG_P_GPIO, DBG_P_PIN_B, state ); break;
+    }
 }
diff --git a/ll/debug_pin.h b/ll/debug_pin.h
index 21ac689c..6799a86c 100644
--- a/ll/debug_pin.h
+++ b/ll/debug_pin.h
@@ -4,9 +4,13 @@
 
 void Debug_Pin_Init( void );
 
-void Debug_Pin_Set( uint8_t state );
+// void Debug_Pin_Set( uint8_t state );
+void Debug_Pin_Set(int chan, int state );
 
 // Hardware Abstraction Defines
-#define DBG_P_RCC_ENABLE()  __HAL_RCC_GPIOB_CLK_ENABLE()
-#define DBG_P_PIN           GPIO_PIN_9
-#define DBG_P_GPIO          GPIOB
+// this is the top most LED to the right of the uC
+#define DBG_P_RCC_ENABLE()  __HAL_RCC_GPIOE_CLK_ENABLE()
+#define DBG_P_GPIO          GPIOE
+#define DBG_P_PIN_B         GPIO_PIN_13
+#define DBG_P_PIN_R         GPIO_PIN_14
+#define DBG_P_PIN_G         GPIO_PIN_15
diff --git a/ll/debug_usart.c b/ll/debug_usart.c
index 4991052e..5a4b03df 100644
--- a/ll/debug_usart.c
+++ b/ll/debug_usart.c
@@ -4,8 +4,8 @@
 
 #include "str_buffer.h"
 
-USART_HandleTypeDef handusart;
-str_buffer_t* str_buf;
+static USART_HandleTypeDef handusart;
+static str_buffer_t* str_buf;
 
 #ifdef RELEASE
 void Debug_USART_Init(void){ return; }
diff --git a/ll/debug_usart.h b/ll/debug_usart.h
index 86192e7d..96c3a4d1 100644
--- a/ll/debug_usart.h
+++ b/ll/debug_usart.h
@@ -5,30 +5,30 @@
 #include "stm32f7xx_hal_conf.h"
 #include "interrupts.h" // DEBUG_IRQPriority
 
-#define DBG_USART_GPIO_RCC()	__HAL_RCC_GPIOC_CLK_ENABLE()
-#define DBG_USART_USART_RCC()	__HAL_RCC_USART3_CLK_ENABLE()
+#define DBG_USART_GPIO_RCC()	__HAL_RCC_GPIOD_CLK_ENABLE()
+#define DBG_USART_USART_RCC()	__HAL_RCC_USART2_CLK_ENABLE()
 #define DBG_DMAx_CLK_ENABLE()	__HAL_RCC_DMA1_CLK_ENABLE()
 
 #define DBG_USART_baud			115200
-#define DBG_USARTx 				USART3
-#define DBG_USART_AF			GPIO_AF7_USART3
-#define DBG_USART_GPIO			GPIOC
-#define DBG_USART_TXPIN			GPIO_PIN_10
+#define DBG_USARTx 				USART2
+#define DBG_USART_AF			GPIO_AF7_USART2
+#define DBG_USART_GPIO			GPIOD
+#define DBG_USART_TXPIN			GPIO_PIN_5
 #define DBG_USART_RXPIN			GPIO_PIN_11
 
 // Definition for USARTx's DMA
-#define USARTx_TX_DMA_STREAM	DMA1_Stream3
-#define USARTx_RX_DMA_STREAM	DMA1_Stream1
+#define USARTx_TX_DMA_STREAM	DMA1_Stream6
+#define USARTx_RX_DMA_STREAM	DMA1_Stream5
 #define USARTx_TX_DMA_CHANNEL	DMA_CHANNEL_4
 #define USARTx_RX_DMA_CHANNEL	DMA_CHANNEL_4
 
-#define USARTx_DMA_TX_IRQn		DMA1_Stream3_IRQn
-#define USARTx_DMA_RX_IRQn		DMA1_Stream1_IRQn
-#define USARTx_DMA_TX_IRQHandler	DMA1_Stream3_IRQHandler
-#define USARTx_DMA_RX_IRQHandler	DMA1_Stream1_IRQHandler
+#define USARTx_DMA_TX_IRQn		DMA1_Stream6_IRQn
+#define USARTx_DMA_RX_IRQn		DMA1_Stream5_IRQn
+#define USARTx_DMA_TX_IRQHandler	DMA1_Stream6_IRQHandler
+#define USARTx_DMA_RX_IRQHandler	DMA1_Stream5_IRQHandler
 
-#define USARTx_IRQn				    USART3_IRQn
-#define USARTx_IRQHandler		    USART3_IRQHandler
+#define USARTx_IRQn				    USART2_IRQn
+#define USARTx_IRQHandler		    USART2_IRQHandler
 #define USARTx_IRQPriority          DEBUG_IRQPriority
 #define USARTx_IRQSubPriority       0
 #define USARTx_DMA_IRQPriority      DEBUG_IRQPriority
diff --git a/ll/system.c b/ll/system.c
index fb1c6211..ca4d2fda 100644
--- a/ll/system.c
+++ b/ll/system.c
@@ -45,7 +45,7 @@ static void Sys_Clk_Config(void)
 {
     __HAL_RCC_PWR_CLK_ENABLE();
 
-    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
+    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
     static RCC_OscInitTypeDef osc;
     osc.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -56,6 +56,7 @@ static void Sys_Clk_Config(void)
     osc.PLL.PLLN       = 432;
     osc.PLL.PLLP       = RCC_PLLP_DIV2;
     osc.PLL.PLLQ       = 9;
+    osc.PLL.PLLR       = 7;
     if(HAL_RCC_OscConfig(&osc) != HAL_OK){ Error_Handler(); }
 
     if(HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); }
@@ -84,8 +85,8 @@ static void MPU_Config(void)
     // Configure the MPU attributes as WT for SRAM
     mpu.Enable           = MPU_REGION_ENABLE;
     // mpu.Enable           = MPU_REGION_DISABLE;
-    // mpu.BaseAddress      = 0x20020000;
-    mpu.BaseAddress      = 0x20000000;
+    mpu.BaseAddress      = 0x20020000;
+    // mpu.BaseAddress      = 0x20000000;
     mpu.Size             = MPU_REGION_SIZE_256KB;
     mpu.AccessPermission = MPU_REGION_FULL_ACCESS;
     mpu.IsBufferable     = MPU_ACCESS_NOT_BUFFERABLE;
@@ -98,6 +99,24 @@ static void MPU_Config(void)
     HAL_MPU_ConfigRegion(&mpu);
 
     HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
+
+    // // Configure the MPU attributes as WT for SRAM
+    // mpu.Enable           = MPU_REGION_ENABLE;
+    // // mpu.Enable           = MPU_REGION_DISABLE;
+    // // mpu.BaseAddress      = 0x20020000;
+    // mpu.BaseAddress      = 0x20000000;
+    // mpu.Size             = MPU_REGION_SIZE_256KB;
+    // mpu.AccessPermission = MPU_REGION_FULL_ACCESS;
+    // mpu.IsBufferable     = MPU_ACCESS_NOT_BUFFERABLE;
+    // mpu.IsCacheable      = MPU_ACCESS_CACHEABLE;
+    // mpu.IsShareable      = MPU_ACCESS_SHAREABLE;
+    // mpu.Number           = MPU_REGION_NUMBER0;
+    // mpu.TypeExtField     = MPU_TEX_LEVEL0;
+    // mpu.SubRegionDisable = 0x00;
+    // mpu.DisableExec      = MPU_INSTRUCTION_ACCESS_ENABLE;
+    // HAL_MPU_ConfigRegion(&mpu);
+
+    // HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 }
 
 static void CPU_CACHE_Enable(void)
@@ -115,7 +134,8 @@ static void Error_Handler(void)
 
 unsigned int getUID_Word( unsigned int offset )
 {
-    const uint32_t base = 0x1FF07A10;
+    // const uint32_t base = 0x1FF07A10;
+    const uint32_t base = 0x1FF0F420;
     //return (uint32_t)(READ_REG(*((uint32_t*)(UID_BASE + offset))));
     //return (uint32_t)(READ_REG(UID_BASE + offset));
     uint32_t* x = (uint32_t*)(base + offset);
diff --git a/main.c b/main.c
index 3041d709..37f993a2 100755
--- a/main.c
+++ b/main.c
@@ -7,13 +7,13 @@
 #include "lib/events.h"
 #include "ll/timers.h"
 #include "lib/metro.h"
-#include "lib/clock.h"
+// #include "lib/clock.h"
 #include "lib/caw.h"
-#include "lib/ii.h"
+// #include "lib/ii.h"
 #include "ll/i2c_pullups.h" // i2c_hw_pullups_init
 #include "ll/random.h"
 #include "lib/lualink.h"
-#include "lib/repl.h"
+// #include "lib/repl.h"
 #include "usbd/usbd_cdc_interface.h" // CDC_main_init()
 #include "lib/bootloader.h" // bootloader_enter(), bootloader_restart()
 #include "lib/flash.h" // Flash_clear_user_script()
@@ -26,13 +26,16 @@ int main(void)
 
     // Debugging
     Debug_Pin_Init();
+    Debug_Pin_Set(0,1);
     Debug_USART_Init(); // ignored in TRACE mode
     // User-readable status led
-    status_led_init();
-    status_led_fast(LED_SLOW); // slow blink until USB connection goes live
-    status_led_set(1); // set status to ON to show sign of life straight away
+    // status_led_init();
+    // status_led_fast(LED_SLOW); // slow blink until USB connection goes live
+    // status_led_set(1); // set status to ON to show sign of life straight away
 
-    printf("\n\nhi from crow!\n");
+    printf("\n\nhi from crow!\n\r");
+    
+        U_PrintNow();
 
     // Drivers
     int max_timers = Timer_Init();
@@ -40,50 +43,62 @@ int main(void)
     IO_Start(); // must start IO before running lua init() script
     events_init();
     Metro_Init( max_timers-2 ); // reserve 2 timers for USB & ADC
-    clock_init( 100 ); // TODO how to pass it the timer?
+    // clock_init( 100 ); // TODO how to pass it the timer?
     Caw_Init( max_timers-1 ); // use last timer
     CDC_clear_buffers();
 
-    i2c_hw_pullups_init(); // enable GPIO for v1.1 hardware pullups
-    ii_init( II_CROW );
+    // i2c_hw_pullups_init(); // enable GPIO for v1.1 hardware pullups
+    // ii_init( II_CROW );
     Random_Init();
 
-    REPL_init( Lua_Init() );
+    // REPL_init( Lua_Init() );
 
-    REPL_print_script_name();
-    Lua_crowbegin();
+    // REPL_print_script_name();
+    // Lua_crowbegin();
 
     uint32_t last_tick = HAL_GetTick();
+    int saw = 0;
+    int g_state = 0;
     while(1){
         CPU_count++;
-        U_PrintNow();
-        switch( Caw_try_receive() ){ // true on pressing 'enter'
-            case C_repl:        REPL_eval( Caw_get_read()
-                                         , Caw_get_read_len()
-                                         , Caw_send_luaerror
-                                         ); break;
-            case C_boot:        bootloader_enter(); break;
-            case C_startupload: REPL_begin_upload(); break;
-            case C_endupload:   REPL_upload(0); break;
-            case C_flashupload: REPL_upload(1); break;
-            case C_restart:     bootloader_restart(); break;
-            case C_print:       REPL_print_script(); break;
-            case C_version:     system_print_version(); break;
-            case C_identity:    system_print_identity(); break;
-            case C_killlua:     REPL_reset(); break;
-            case C_flashclear:  REPL_clear_script(); break;
-            case C_loadFirst:   REPL_default_script(); break;
-            default: break; // 'C_none' does nothing
+
+        saw++;
+        saw &= 0xfffff;
+        if(saw == 0x7ffff){
+            Debug_Pin_Set(1, g_state);
+            g_state ^= 1;
+            // Caw_printf("hi\n\r");
         }
+
+        U_PrintNow();
+        Caw_try_receive();
+        // switch( Caw_try_receive() ){ // true on pressing 'enter'
+        //     case C_repl:        REPL_eval( Caw_get_read()
+        //                                  , Caw_get_read_len()
+        //                                  , Caw_send_luaerror
+        //                                  ); break;
+        //     case C_boot:        bootloader_enter(); break;
+        //     case C_startupload: REPL_begin_upload(); break;
+        //     case C_endupload:   REPL_upload(0); break;
+        //     case C_flashupload: REPL_upload(1); break;
+        //     case C_restart:     bootloader_restart(); break;
+        //     case C_print:       REPL_print_script(); break;
+        //     case C_version:     system_print_version(); break;
+        //     case C_identity:    system_print_identity(); break;
+        //     case C_killlua:     REPL_reset(); break;
+        //     case C_flashclear:  REPL_clear_script(); break;
+        //     case C_loadFirst:   REPL_default_script(); break;
+        //     default: break; // 'C_none' does nothing
+        // }
         Random_Update();
         uint32_t time_now = HAL_GetTick(); // for running a 1ms-interval tick
         if( last_tick != time_now ){ // called on 1ms interval
             last_tick = time_now;
-            clock_update(time_now);
+            // clock_update(time_now);
             status_led_tick(time_now);
         }
         event_next(); // check/execute single event
-        ii_leader_process();
+        // ii_leader_process();
         Caw_send_queued();
     }
 }
diff --git a/stm32_flash.ld b/stm32_flash.ld
index 23da864d..907ed09d 100755
--- a/stm32_flash.ld
+++ b/stm32_flash.ld
@@ -31,18 +31,18 @@
 ENTRY(Reset_Handler)
 
 /* Highest address of the user mode stack */
-_estack = 0x20040000;    /* end of 256K RAM */
+_estack = 0x20080000;    /* end of 256K RAM */
 
 /* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Heap_Size = 0x1000;      /* required amount of heap  */
 _Min_Stack_Size = 0x10000; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
 {
   /* FLASH (rx)      : ORIGIN = 0x00200000, LENGTH = 512K */ /* ITCM interface */
-  FLASH (rx)      : ORIGIN = 0x08020000, LENGTH = 384K /* AXIM interface */
-  RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 256K
+  FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K /* AXIM interface */
+  RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 512K
   /* MEMORY_B1 (rx)  : ORIGIN = 0x60000000, LENGTH = 0K */
   /* CCMRAM (rw)     : ORIGIN = 0x10000000, LENGTH = 64K */
 }
diff --git a/stm32f7xx.h b/stm32f7xx.h
index 2ddb1021..c2be92f9 100644
--- a/stm32f7xx.h
+++ b/stm32f7xx.h
@@ -93,13 +93,13 @@
   /* #define STM32F745xx */   /*!< STM32F745VE, STM32F745VG, STM32F745ZG, STM32F745ZE, STM32F745IE, STM32F745IG Devices */
    /*#define STM32F765xx */   /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
                                    STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
-  /* #define STM32F767xx */   /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
+   #define STM32F767xx    /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
                                    STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
    /*#define STM32F769xx*/    /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
                                    STM32F769NG, STM32F769NI, STM32F768AI Devices */
   /* #define STM32F777xx */   /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
   /* #define STM32F779xx */   /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
-   #define STM32F722xx    /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
+  /* #define STM32F722xx */   /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
                                    STM32F722VC, STM32F722RC Devices */
   /* #define STM32F723xx */   /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
   /* #define STM32F732xx */   /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
diff --git a/stm32f7xx_hal_conf.h b/stm32f7xx_hal_conf.h
index de5de43c..731bdb64 100644
--- a/stm32f7xx_hal_conf.h
+++ b/stm32f7xx_hal_conf.h
@@ -78,7 +78,7 @@
 #define HAL_RCC_MODULE_ENABLED
 #define HAL_RNG_MODULE_ENABLED
 /*#define HAL_RTC_MODULE_ENABLED*/
-/*#define HAL_SAI_MODULE_ENABLED*/
+#define HAL_SAI_MODULE_ENABLED
 /*#define HAL_SD_MODULE_ENABLED*/
 /*#define HAL_SPDIFRX_MODULE_ENABLED*/
 #define HAL_SPI_MODULE_ENABLED
diff --git a/system_stm32f7xx.c b/system_stm32f7xx.c
index b9b1aaca..d47a20b9 100644
--- a/system_stm32f7xx.c
+++ b/system_stm32f7xx.c
@@ -97,7 +97,7 @@
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */
 /* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x20000 /*!< Vector Table base offset field.
+#define VECT_TAB_OFFSET  0x0000 /*!< Vector Table base offset field.
                                    This value must be a multiple of 0x200. */
 /******************************************************************************/
 
diff --git a/usbd/usbd_conf.c b/usbd/usbd_conf.c
index 7a230223..899925c5 100755
--- a/usbd/usbd_conf.c
+++ b/usbd/usbd_conf.c
@@ -93,11 +93,11 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd)
     }
     
     /* Configure ID pin */
-    GPIO_InitStruct.Pin = GPIO_PIN_10;
-    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
-    GPIO_InitStruct.Pull = GPIO_PULLUP;
-    GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
-    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+    // GPIO_InitStruct.Pin = GPIO_PIN_10;
+    // GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    // GPIO_InitStruct.Pull = GPIO_PULLUP;
+    // GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+    // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
     
     /* Enable USB FS Clock */
     __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
diff --git a/usbd/usbd_desc.h b/usbd/usbd_desc.h
index 0c9a41a6..3be637ad 100755
--- a/usbd/usbd_desc.h
+++ b/usbd/usbd_desc.h
@@ -55,9 +55,14 @@
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
 // TODO: BIG NOTE: THIS IS REQUIRED FOR F722! FAILS W F756 or other device_id!!
-#define         DEVICE_ID1          (0x1FF07A10)
-#define         DEVICE_ID2          (0x1FF07A14)
-#define         DEVICE_ID3          (0x1FF07A18)
+// #define         DEVICE_ID1          (0x1FF07A10)
+// #define         DEVICE_ID2          (0x1FF07A14)
+// #define         DEVICE_ID3          (0x1FF07A18)
+
+// these values for f769
+#define         DEVICE_ID1          (0x1FFF7A10)
+#define         DEVICE_ID2          (0x1FFF7A14)
+#define         DEVICE_ID3          (0x1FFF7A18)
 
 #define  USB_SIZ_STRING_SERIAL       0x1A
 /* Exported macro ------------------------------------------------------------*/
diff --git a/usbd/usbd_main.c b/usbd/usbd_main.c
index fc737810..095c9a4b 100755
--- a/usbd/usbd_main.c
+++ b/usbd/usbd_main.c
@@ -34,11 +34,7 @@ void USB_CDC_DeInit(void)
 
 extern PCD_HandleTypeDef hpcd;
 
-#ifdef USE_USB_FS
 void OTG_FS_IRQHandler(void)
-#else
-void OTG_HS_IRQHandler(void)
-#endif
 {
     HAL_PCD_IRQHandler(&hpcd);
 }
diff --git a/usbd/usbd_main.h b/usbd/usbd_main.h
index fb7df707..69340be9 100755
--- a/usbd/usbd_main.h
+++ b/usbd/usbd_main.h
@@ -11,10 +11,6 @@
 void USB_CDC_Init(int timer_index);
 void USB_CDC_DeInit(void);
 
-#ifdef USE_USB_FS
 void OTG_FS_IRQHandler(void);
-#else
-void OTG_HS_IRQHandler(void);
-#endif
 
 void TIMu_IRQHandler(void);