-
-
Notifications
You must be signed in to change notification settings - Fork 33
/
board.h
1365 lines (1324 loc) · 84.7 KB
/
board.h
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#ifndef BOARD_H
#define BOARD_H
/*
* Setup for STMicroelectronics STM32F411E-DISCOVERY board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32F411_DISCOVERY
#define BOARD_NAME "STMicroelectronics STM32F411VE Discovery for nanoFramework"
/*
* Completely wacko definition of a flash sector here
*/
#define FLASH_SECTOR_11 ((uint32_t)11U)
/*
* Board oscillators-related settings.
* NOTE: LSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 0U
#endif
#if !defined(STM32_HSECLK)
#define STM32_HSECLK 8000000U
#endif
/*
* Board voltages.
* Required for performance limits calculation.
*/
#define STM32_VDD 300U
/*
* MCU type as defined in the ST header.
*/
#define STM32F411xE
/*
* IO pins assignments.
*/
#define GPIOA_BUTTON 0U
#define GPIOA_ADC1_CH1 1U
#define GPIOA_USART2_TX 2U
#define GPIOA_USART2_RX 3U
#define GPIOA_LRCK 4U
#define GPIOA_SPI1_SCK 5U
#define GPIOA_SPI1_MISO 6U
#define GPIOA_SPI1_MOSI 7U
#define GPIOA_I2C3_SCL 8U
#define GPIOA_OTG_FS_VBUS 9U
#define GPIOA_OTG_FS_ID 10U
#define GPIOA_OTG_FS_DM 11U
#define GPIOA_OTG_FS_DP 12U
#define GPIOA_SWDIO 13U
#define GPIOA_SWCLK 14U
#define GPIOA_USART1_TX 15U
#define GPIOB_ADC1_CH8 0U
#define GPIOB_ADC1_CH9 1U
#define GPIOB_PIN2 2U
#define GPIOB_SWO 3U
#define GPIOB_PIN4 4U
#define GPIOB_PIN5 5U
#define GPIOB_I2C1_SCL 6U
#define GPIOB_USART1_RX 7U
#define GPIOB_PIN8 8U
#define GPIOB_I2C1_SDA 9U
#define GPIOB_CLK_IN 10U
#define GPIOB_PIN11 11U
#define GPIOB_PIN12 12U
#define GPIOB_SPI2_SCK 13U
#define GPIOB_SPI2_MISO 14U
#define GPIOB_SPI2_MOSI 15U
#define GPIOC_OTG_FS_POWER_ON 0U
#define GPIOC_ADC1_CH11 1U
#define GPIOC_ADC1_CH12 2U
#define GPIOC_PDM_OUT 3U
#define GPIOC_PIN4 4U
#define GPIOC_PIN5 5U
#define GPIOC_PIN6 6U
#define GPIOC_I2S3_MCLK 7U
#define GPIOC_PIN8 8U
#define GPIOC_I2C3_SDA 9U
#define GPIOC_I2S3_SCLK 10U
#define GPIOC_PIN11 11U
#define GPIOC_I2S3_SDIN 12U
#define GPIOC_PIN13 13U
#define GPIOC_OSC32_IN 14U
#define GPIOC_OSC32_OUT 15U
#define GPIOD_PIN0 0U
#define GPIOD_PIN1 1U
#define GPIOD_PIN2 2U
#define GPIOD_PIN3 3U
#define GPIOD_RESET 4U
#define GPIOD_OTG_FS_OC 5U
#define GPIOD_PIN6 6U
#define GPIOD_PIN7 7U
#define GPIOD_PIN8 8U
#define GPIOD_PIN9 9U
#define GPIOD_PIN10 10U
#define GPIOD_PIN11 11U
#define GPIOD_LD4_GREEN 12U
#define GPIOD_LD3_ORANGE 13U
#define GPIOD_LD5_RED 14U
#define GPIOD_LD6_BLUE 15U
#define GPIOE_L3GD20_INT1 0U
#define GPIOE_L3GD20_INT2 1U
#define GPIOE_DLHC_DRDY 2U
#define GPIOE_L3GD20_CS_SPI 3U
#define GPIOE_DLHC_INT1 4U
#define GPIOE_DLHC_INT2 5U
#define GPIOE_PIN6 6U
#define GPIOE_PIN7 7U
#define GPIOE_PIN8 8U
#define GPIOE_PIN9 9U
#define GPIOE_PIN10 10U
#define GPIOE_PIN11 11U
#define GPIOE_PIN12 12U
#define GPIOE_PIN13 13U
#define GPIOE_PIN14 14U
#define GPIOE_PIN15 15U
#define GPIOF_PIN0 0U
#define GPIOF_PIN1 1U
#define GPIOF_PIN2 2U
#define GPIOF_PIN3 3U
#define GPIOF_PIN4 4U
#define GPIOF_PIN5 5U
#define GPIOF_PIN6 6U
#define GPIOF_PIN7 7U
#define GPIOF_PIN8 8U
#define GPIOF_PIN9 9U
#define GPIOF_PIN10 10U
#define GPIOF_PIN11 11U
#define GPIOF_PIN12 12U
#define GPIOF_PIN13 13U
#define GPIOF_PIN14 14U
#define GPIOF_PIN15 15U
#define GPIOG_PIN0 0U
#define GPIOG_PIN1 1U
#define GPIOG_PIN2 2U
#define GPIOG_PIN3 3U
#define GPIOG_PIN4 4U
#define GPIOG_PIN5 5U
#define GPIOG_PIN6 6U
#define GPIOG_PIN7 7U
#define GPIOG_PIN8 8U
#define GPIOG_PIN9 9U
#define GPIOG_PIN10 10U
#define GPIOG_PIN11 11U
#define GPIOG_PIN12 12U
#define GPIOG_PIN13 13U
#define GPIOG_PIN14 14U
#define GPIOG_PIN15 15U
#define GPIOH_OSC_IN 0U
#define GPIOH_OSC_OUT 1U
#define GPIOH_PIN2 2U
#define GPIOH_PIN3 3U
#define GPIOH_PIN4 4U
#define GPIOH_PIN5 5U
#define GPIOH_PIN6 6U
#define GPIOH_PIN7 7U
#define GPIOH_PIN8 8U
#define GPIOH_PIN9 9U
#define GPIOH_PIN10 10U
#define GPIOH_PIN11 11U
#define GPIOH_PIN12 12U
#define GPIOH_PIN13 13U
#define GPIOH_PIN14 14U
#define GPIOH_PIN15 15U
#define GPIOI_PIN0 0U
#define GPIOI_PIN1 1U
#define GPIOI_PIN2 2U
#define GPIOI_PIN3 3U
#define GPIOI_PIN4 4U
#define GPIOI_PIN5 5U
#define GPIOI_PIN6 6U
#define GPIOI_PIN7 7U
#define GPIOI_PIN8 8U
#define GPIOI_PIN9 9U
#define GPIOI_PIN10 10U
#define GPIOI_PIN11 11U
#define GPIOI_PIN12 12U
#define GPIOI_PIN13 13U
#define GPIOI_PIN14 14U
#define GPIOI_PIN15 15U
/*
* IO lines assignments.
*/
#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
#define LINE_ADC1_CH1 PAL_LINE(GPIOA, 1U)
#define LINE_USART2_TX PAL_LINE(GPIOA, 2U)
#define LINE_USART2_RX PAL_LINE(GPIOA, 3U)
#define LINE_LRCK PAL_LINE(GPIOA, 4U)
#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U)
#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U)
#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U)
#define LINE_I2C3_SCL PAL_LINE(GPIOA, 8U)
#define LINE_OTG_FS_VBUS PAL_LINE(GPIOA, 9U)
#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U)
#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
#define LINE_USART1_TX PAL_LINE(GPIOA, 15U)
#define LINE_ADC1_CH8 PAL_LINE(GPIOB, 0U)
#define LINE_ADC1_CH9 PAL_LINE(GPIOB, 1U)
#define LINE_SWO PAL_LINE(GPIOB, 3U)
#define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U)
#define LINE_USART1_RX PAL_LINE(GPIOB, 7U)
#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
#define LINE_CLK_IN PAL_LINE(GPIOB, 10U)
#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
#define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U)
#define LINE_ADC1_CH11 PAL_LINE(GPIOC, 1U)
#define LINE_ADC1_CH12 PAL_LINE(GPIOC, 2U)
#define LINE_PDM_OUT PAL_LINE(GPIOC, 3U)
#define LINE_I2S3_MCLK PAL_LINE(GPIOC, 7U)
#define LINE_I2C3_SDA PAL_LINE(GPIOC, 9U)
#define LINE_I2S3_SCLK PAL_LINE(GPIOC, 10U)
#define LINE_I2S3_SDIN PAL_LINE(GPIOC, 12U)
#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
#define LINE_RESET PAL_LINE(GPIOD, 4U)
#define LINE_OTG_FS_OC PAL_LINE(GPIOD, 5U)
#define LINE_LD4_GREEN PAL_LINE(GPIOD, 12U)
#define LINE_LD3_ORANGE PAL_LINE(GPIOD, 13U)
#define LINE_LD5_RED PAL_LINE(GPIOD, 14U)
#define LINE_LD6_BLUE PAL_LINE(GPIOD, 15U)
#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U)
#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U)
#define LINE_DLHC_DRDY PAL_LINE(GPIOE, 2U)
#define LINE_L3GD20_CS_SPI PAL_LINE(GPIOE, 3U)
#define LINE_DLHC_INT1 PAL_LINE(GPIOE, 4U)
#define LINE_DLHC_INT2 PAL_LINE(GPIOE, 5U)
#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
/*
* GPIOA setup:
*
* PA0 - BUTTON (input pullup).
* PA1 - ADC1_IN1 (analog).
* PA2 - USART2_TX (alternate 7).
* PA3 - USART2_RX (alternate 7).
* PA4 - LRCK (alternate 6).
* PA5 - SPI1_SCK (alternate 5).
* PA6 - SPI1_MISO (alternate 5).
* PA7 - SPI1_MOSI (alternate 5).
* PA8 - I2C3_SCL (alternate 4).
* PA9 - OTG_FS_VBUS (input floating).
* PA10 - OTG_FS_ID (alternate 10).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - USART1_TX (alternate 7).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
PIN_MODE_ANALOG(GPIOA_ADC1_CH1) | \
PIN_MODE_ALTERNATE(GPIOA_USART2_TX) | \
PIN_MODE_ALTERNATE(GPIOA_USART2_RX) | \
PIN_MODE_ALTERNATE(GPIOA_LRCK) | \
PIN_MODE_ALTERNATE(GPIOA_SPI1_SCK) | \
PIN_MODE_ALTERNATE(GPIOA_SPI1_MISO) | \
PIN_MODE_ALTERNATE(GPIOA_SPI1_MOSI) | \
PIN_MODE_ALTERNATE(GPIOA_I2C3_SCL) | \
PIN_MODE_INPUT(GPIOA_OTG_FS_VBUS) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_ALTERNATE(GPIOA_USART1_TX))
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
PIN_OTYPE_PUSHPULL(GPIOA_ADC1_CH1) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART2_TX) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART2_RX) | \
PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \
PIN_OTYPE_PUSHPULL(GPIOA_SPI1_SCK) | \
PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MISO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MOSI) | \
PIN_OTYPE_OPENDRAIN(GPIOA_I2C3_SCL) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_VBUS) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_USART1_TX))
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \
PIN_OSPEED_HIGH(GPIOA_ADC1_CH1) | \
PIN_OSPEED_MEDIUM(GPIOA_USART2_TX) | \
PIN_OSPEED_MEDIUM(GPIOA_USART2_RX) | \
PIN_OSPEED_HIGH(GPIOA_LRCK) | \
PIN_OSPEED_MEDIUM(GPIOA_SPI1_SCK) | \
PIN_OSPEED_MEDIUM(GPIOA_SPI1_MISO) | \
PIN_OSPEED_MEDIUM(GPIOA_SPI1_MOSI) | \
PIN_OSPEED_HIGH(GPIOA_I2C3_SCL) | \
PIN_OSPEED_HIGH(GPIOA_OTG_FS_VBUS) | \
PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \
PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
PIN_OSPEED_HIGH(GPIOA_USART1_TX))
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
PIN_PUPDR_FLOATING(GPIOA_ADC1_CH1) | \
PIN_PUPDR_FLOATING(GPIOA_USART2_TX) | \
PIN_PUPDR_FLOATING(GPIOA_USART2_RX) | \
PIN_PUPDR_FLOATING(GPIOA_LRCK) | \
PIN_PUPDR_FLOATING(GPIOA_SPI1_SCK) | \
PIN_PUPDR_FLOATING(GPIOA_SPI1_MISO) | \
PIN_PUPDR_FLOATING(GPIOA_SPI1_MOSI) | \
PIN_PUPDR_FLOATING(GPIOA_I2C3_SCL) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_VBUS) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
PIN_PUPDR_FLOATING(GPIOA_USART1_TX))
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
PIN_ODR_LOW(GPIOA_ADC1_CH1) | \
PIN_ODR_HIGH(GPIOA_USART2_TX) | \
PIN_ODR_HIGH(GPIOA_USART2_RX) | \
PIN_ODR_HIGH(GPIOA_LRCK) | \
PIN_ODR_HIGH(GPIOA_SPI1_SCK) | \
PIN_ODR_HIGH(GPIOA_SPI1_MISO) | \
PIN_ODR_HIGH(GPIOA_SPI1_MOSI) | \
PIN_ODR_HIGH(GPIOA_I2C3_SCL) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_VBUS) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_USART1_TX))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
PIN_AFIO_AF(GPIOA_ADC1_CH1, 0U) | \
PIN_AFIO_AF(GPIOA_USART2_TX, 7U) | \
PIN_AFIO_AF(GPIOA_USART2_RX, 7U) | \
PIN_AFIO_AF(GPIOA_LRCK, 6U) | \
PIN_AFIO_AF(GPIOA_SPI1_SCK, 5U) | \
PIN_AFIO_AF(GPIOA_SPI1_MISO, 5U) | \
PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5U))
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_I2C3_SCL, 4U) | \
PIN_AFIO_AF(GPIOA_OTG_FS_VBUS, 0U) | \
PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
PIN_AFIO_AF(GPIOA_USART1_TX, 7U))
/*
* GPIOB setup:
*
* PB0 - ADC1_IN8 (analog).
* PB1 - ADC1_IN9 (analog).
* PB2 - PIN2 (input pullup).
* PB3 - SWO (alternate 0).
* PB4 - PIN4 (input pullup).
* PB5 - PIN5 (input pullup).
* PB6 - I2C1_SCL (alternate 4).
* PB7 - USART1_RX (alternate 7).
* PB8 - PIN8 (input pullup).
* PB9 - I2C1_SDA (alternate 4).
* PB10 - CLK_IN (input pullup).
* PB11 - PIN11 (input pullup).
* PB12 - PIN12 (input pullup).
* PB13 - SPI2_SCK (alternate 5).
* PB14 - SPI2_MISO (alternate 5).
* PB15 - SPI2_MOSI (alternate 5).
*/
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_ADC1_CH8) | \
PIN_MODE_ANALOG(GPIOB_ADC1_CH9) | \
PIN_MODE_INPUT(GPIOB_PIN2) | \
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
PIN_MODE_INPUT(GPIOB_PIN4) | \
PIN_MODE_INPUT(GPIOB_PIN5) | \
PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \
PIN_MODE_ALTERNATE(GPIOB_USART1_RX) | \
PIN_MODE_INPUT(GPIOB_PIN8) | \
PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \
PIN_MODE_INPUT(GPIOB_CLK_IN) | \
PIN_MODE_INPUT(GPIOB_PIN11) | \
PIN_MODE_INPUT(GPIOB_PIN12) | \
PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \
PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \
PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ADC1_CH8) | \
PIN_OTYPE_PUSHPULL(GPIOB_ADC1_CH9) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \
PIN_OTYPE_PUSHPULL(GPIOB_USART1_RX) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \
PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \
PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI))
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ADC1_CH8) | \
PIN_OSPEED_HIGH(GPIOB_ADC1_CH9) | \
PIN_OSPEED_HIGH(GPIOB_PIN2) | \
PIN_OSPEED_HIGH(GPIOB_SWO) | \
PIN_OSPEED_HIGH(GPIOB_PIN4) | \
PIN_OSPEED_HIGH(GPIOB_PIN5) | \
PIN_OSPEED_HIGH(GPIOB_I2C1_SCL) | \
PIN_OSPEED_HIGH(GPIOB_USART1_RX) | \
PIN_OSPEED_HIGH(GPIOB_PIN8) | \
PIN_OSPEED_HIGH(GPIOB_I2C1_SDA) | \
PIN_OSPEED_HIGH(GPIOB_CLK_IN) | \
PIN_OSPEED_HIGH(GPIOB_PIN11) | \
PIN_OSPEED_HIGH(GPIOB_PIN12) | \
PIN_OSPEED_HIGH(GPIOB_SPI2_SCK) | \
PIN_OSPEED_HIGH(GPIOB_SPI2_MISO) | \
PIN_OSPEED_HIGH(GPIOB_SPI2_MOSI))
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_ADC1_CH8) | \
PIN_PUPDR_FLOATING(GPIOB_ADC1_CH9) | \
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
PIN_PUPDR_FLOATING(GPIOB_SWO) | \
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
PIN_PUPDR_FLOATING(GPIOB_I2C1_SCL) | \
PIN_PUPDR_FLOATING(GPIOB_USART1_RX) | \
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
PIN_PUPDR_FLOATING(GPIOB_I2C1_SDA) | \
PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \
PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \
PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \
PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI))
#define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_ADC1_CH8) | \
PIN_ODR_LOW(GPIOB_ADC1_CH9) | \
PIN_ODR_HIGH(GPIOB_PIN2) | \
PIN_ODR_HIGH(GPIOB_SWO) | \
PIN_ODR_HIGH(GPIOB_PIN4) | \
PIN_ODR_HIGH(GPIOB_PIN5) | \
PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \
PIN_ODR_HIGH(GPIOB_USART1_RX) | \
PIN_ODR_HIGH(GPIOB_PIN8) | \
PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \
PIN_ODR_HIGH(GPIOB_CLK_IN) | \
PIN_ODR_HIGH(GPIOB_PIN11) | \
PIN_ODR_HIGH(GPIOB_PIN12) | \
PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \
PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \
PIN_ODR_HIGH(GPIOB_SPI2_MOSI))
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ADC1_CH8, 0U) | \
PIN_AFIO_AF(GPIOB_ADC1_CH9, 0U) | \
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
PIN_AFIO_AF(GPIOB_SWO, 0U) | \
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \
PIN_AFIO_AF(GPIOB_USART1_RX, 7U))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U) | \
PIN_AFIO_AF(GPIOB_CLK_IN, 0U) | \
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
PIN_AFIO_AF(GPIOB_SPI2_SCK, 5U) | \
PIN_AFIO_AF(GPIOB_SPI2_MISO, 5U) | \
PIN_AFIO_AF(GPIOB_SPI2_MOSI, 5U))
/*
* GPIOC setup:
*
* PC0 - OTG_FS_POWER_ON (output pushpull maximum).
* PC1 - ADC1_IN11 (analog).
* PC2 - ADC1_IN12 (analog).
* PC3 - PDM_OUT (input pullup).
* PC4 - PIN4 (input pullup).
* PC5 - PIN5 (input pullup).
* PC6 - PIN6 (input pullup).
* PC7 - I2S3_MCLK (alternate 6).
* PC8 - PIN8 (input pullup).
* PC9 - I2C3_SDA (alternate 4).
* PC10 - I2S3_SCLK (alternate 6).
* PC11 - PIN11 (input pullup).
* PC12 - I2S3_SDIN (alternate 6).
* PC13 - BUTTON (input floating).
* PC14 - OSC32_IN (input floating).
* PC15 - OSC32_OUT (input floating).
*/
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) | \
PIN_MODE_ANALOG(GPIOC_ADC1_CH11) | \
PIN_MODE_ANALOG(GPIOC_ADC1_CH12) | \
PIN_MODE_INPUT(GPIOC_PDM_OUT) | \
PIN_MODE_INPUT(GPIOC_PIN4) | \
PIN_MODE_INPUT(GPIOC_PIN5) | \
PIN_MODE_INPUT(GPIOC_PIN6) | \
PIN_MODE_ALTERNATE(GPIOC_I2S3_MCLK) | \
PIN_MODE_INPUT(GPIOC_PIN8) | \
PIN_MODE_ALTERNATE(GPIOC_I2C3_SDA) | \
PIN_MODE_ALTERNATE(GPIOC_I2S3_SCLK) | \
PIN_MODE_INPUT(GPIOC_PIN11) | \
PIN_MODE_ALTERNATE(GPIOC_I2S3_SDIN) | \
PIN_MODE_INPUT(GPIOC_PIN13) | \
PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
PIN_MODE_INPUT(GPIOC_OSC32_OUT))
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) | \
PIN_OTYPE_PUSHPULL(GPIOC_ADC1_CH11) | \
PIN_OTYPE_PUSHPULL(GPIOC_ADC1_CH12) | \
PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOC_I2S3_MCLK) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
PIN_OTYPE_OPENDRAIN(GPIOC_I2C3_SDA) | \
PIN_OTYPE_PUSHPULL(GPIOC_I2S3_SCLK) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOC_I2S3_SDIN) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) | \
PIN_OSPEED_HIGH(GPIOC_ADC1_CH11) | \
PIN_OSPEED_HIGH(GPIOC_ADC1_CH12) | \
PIN_OSPEED_HIGH(GPIOC_PDM_OUT) | \
PIN_OSPEED_HIGH(GPIOC_PIN4) | \
PIN_OSPEED_HIGH(GPIOC_PIN5) | \
PIN_OSPEED_HIGH(GPIOC_PIN6) | \
PIN_OSPEED_HIGH(GPIOC_I2S3_MCLK) | \
PIN_OSPEED_HIGH(GPIOC_PIN8) | \
PIN_OSPEED_HIGH(GPIOC_I2C3_SDA) | \
PIN_OSPEED_HIGH(GPIOC_I2S3_SCLK) | \
PIN_OSPEED_HIGH(GPIOC_PIN11) | \
PIN_OSPEED_HIGH(GPIOC_I2S3_SDIN) | \
PIN_OSPEED_HIGH(GPIOC_PIN13) | \
PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) | \
PIN_PUPDR_FLOATING(GPIOC_ADC1_CH11) | \
PIN_PUPDR_FLOATING(GPIOC_ADC1_CH12) | \
PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
PIN_PUPDR_FLOATING(GPIOC_I2S3_MCLK) | \
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
PIN_PUPDR_FLOATING(GPIOC_I2C3_SDA) | \
PIN_PUPDR_FLOATING(GPIOC_I2S3_SCLK) | \
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
PIN_PUPDR_FLOATING(GPIOC_I2S3_SDIN) | \
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \
PIN_ODR_LOW(GPIOC_ADC1_CH11) | \
PIN_ODR_LOW(GPIOC_ADC1_CH12) | \
PIN_ODR_HIGH(GPIOC_PDM_OUT) | \
PIN_ODR_HIGH(GPIOC_PIN4) | \
PIN_ODR_HIGH(GPIOC_PIN5) | \
PIN_ODR_HIGH(GPIOC_PIN6) | \
PIN_ODR_HIGH(GPIOC_I2S3_MCLK) | \
PIN_ODR_HIGH(GPIOC_PIN8) | \
PIN_ODR_HIGH(GPIOC_I2C3_SDA) | \
PIN_ODR_HIGH(GPIOC_I2S3_SCLK) | \
PIN_ODR_HIGH(GPIOC_PIN11) | \
PIN_ODR_HIGH(GPIOC_I2S3_SDIN) | \
PIN_ODR_HIGH(GPIOC_PIN13) | \
PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
PIN_ODR_HIGH(GPIOC_OSC32_OUT))
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0U) | \
PIN_AFIO_AF(GPIOC_ADC1_CH11, 0U) | \
PIN_AFIO_AF(GPIOC_ADC1_CH12, 0U) | \
PIN_AFIO_AF(GPIOC_PDM_OUT, 0U) | \
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
PIN_AFIO_AF(GPIOC_I2S3_MCLK, 6U))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
PIN_AFIO_AF(GPIOC_I2C3_SDA, 4U) | \
PIN_AFIO_AF(GPIOC_I2S3_SCLK, 6U) | \
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
PIN_AFIO_AF(GPIOC_I2S3_SDIN, 6U) | \
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
/*
* GPIOD setup:
*
* PD0 - PIN0 (input pullup).
* PD1 - PIN1 (input pullup).
* PD2 - PIN2 (input pullup).
* PD3 - PIN3 (input pullup).
* PD4 - RESET (output pushpull maximum).
* PD5 - OTG_FS_OC (input floating).
* PD6 - PIN6 (input pullup).
* PD7 - PIN7 (input pullup).
* PD8 - PIN8 (input pullup).
* PD9 - PIN9 (input pullup).
* PD10 - PIN10 (input pullup).
* PD11 - PIN11 (input pullup).
* PD12 - LD4_GREEN (output pushpull maximum).
* PD13 - LD3_ORANGE (output pushpull maximum).
* PD14 - LD5_RED (output pushpull maximum).
* PD15 - LD6_BLUE (output pushpull maximum).
*/
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
PIN_MODE_INPUT(GPIOD_PIN1) | \
PIN_MODE_INPUT(GPIOD_PIN2) | \
PIN_MODE_INPUT(GPIOD_PIN3) | \
PIN_MODE_OUTPUT(GPIOD_RESET) | \
PIN_MODE_INPUT(GPIOD_OTG_FS_OC) | \
PIN_MODE_INPUT(GPIOD_PIN6) | \
PIN_MODE_INPUT(GPIOD_PIN7) | \
PIN_MODE_INPUT(GPIOD_PIN8) | \
PIN_MODE_INPUT(GPIOD_PIN9) | \
PIN_MODE_INPUT(GPIOD_PIN10) | \
PIN_MODE_INPUT(GPIOD_PIN11) | \
PIN_MODE_OUTPUT(GPIOD_LD4_GREEN) | \
PIN_MODE_OUTPUT(GPIOD_LD3_ORANGE) | \
PIN_MODE_OUTPUT(GPIOD_LD5_RED) | \
PIN_MODE_OUTPUT(GPIOD_LD6_BLUE))
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \
PIN_OTYPE_PUSHPULL(GPIOD_OTG_FS_OC) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOD_LD4_GREEN) | \
PIN_OTYPE_PUSHPULL(GPIOD_LD3_ORANGE) | \
PIN_OTYPE_PUSHPULL(GPIOD_LD5_RED) | \
PIN_OTYPE_PUSHPULL(GPIOD_LD6_BLUE))
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
PIN_OSPEED_HIGH(GPIOD_PIN1) | \
PIN_OSPEED_HIGH(GPIOD_PIN2) | \
PIN_OSPEED_HIGH(GPIOD_PIN3) | \
PIN_OSPEED_HIGH(GPIOD_RESET) | \
PIN_OSPEED_HIGH(GPIOD_OTG_FS_OC) | \
PIN_OSPEED_HIGH(GPIOD_PIN6) | \
PIN_OSPEED_HIGH(GPIOD_PIN7) | \
PIN_OSPEED_HIGH(GPIOD_PIN8) | \
PIN_OSPEED_HIGH(GPIOD_PIN9) | \
PIN_OSPEED_HIGH(GPIOD_PIN10) | \
PIN_OSPEED_HIGH(GPIOD_PIN11) | \
PIN_OSPEED_HIGH(GPIOD_LD4_GREEN) | \
PIN_OSPEED_HIGH(GPIOD_LD3_ORANGE) | \
PIN_OSPEED_HIGH(GPIOD_LD5_RED) | \
PIN_OSPEED_HIGH(GPIOD_LD6_BLUE))
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
PIN_PUPDR_FLOATING(GPIOD_RESET) | \
PIN_PUPDR_FLOATING(GPIOD_OTG_FS_OC) | \
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
PIN_PUPDR_FLOATING(GPIOD_LD4_GREEN) | \
PIN_PUPDR_FLOATING(GPIOD_LD3_ORANGE) | \
PIN_PUPDR_FLOATING(GPIOD_LD5_RED) | \
PIN_PUPDR_FLOATING(GPIOD_LD6_BLUE))
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
PIN_ODR_HIGH(GPIOD_PIN1) | \
PIN_ODR_HIGH(GPIOD_PIN2) | \
PIN_ODR_HIGH(GPIOD_PIN3) | \
PIN_ODR_HIGH(GPIOD_RESET) | \
PIN_ODR_HIGH(GPIOD_OTG_FS_OC) | \
PIN_ODR_HIGH(GPIOD_PIN6) | \
PIN_ODR_HIGH(GPIOD_PIN7) | \
PIN_ODR_HIGH(GPIOD_PIN8) | \
PIN_ODR_HIGH(GPIOD_PIN9) | \
PIN_ODR_HIGH(GPIOD_PIN10) | \
PIN_ODR_HIGH(GPIOD_PIN11) | \
PIN_ODR_LOW(GPIOD_LD4_GREEN) | \
PIN_ODR_LOW(GPIOD_LD3_ORANGE) | \
PIN_ODR_LOW(GPIOD_LD5_RED) | \
PIN_ODR_LOW(GPIOD_LD6_BLUE))
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
PIN_AFIO_AF(GPIOD_RESET, 0U) | \
PIN_AFIO_AF(GPIOD_OTG_FS_OC, 0U) | \
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
PIN_AFIO_AF(GPIOD_PIN7, 0U))
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
PIN_AFIO_AF(GPIOD_LD4_GREEN, 0U) | \
PIN_AFIO_AF(GPIOD_LD3_ORANGE, 0U) | \
PIN_AFIO_AF(GPIOD_LD5_RED, 0U) | \
PIN_AFIO_AF(GPIOD_LD6_BLUE, 0U))
/*
* GPIOE setup:
*
* PE0 - L3GD20_INT1 (input floating).
* PE1 - L3GD20_INT2 (input floating).
* PE2 - DLHC_DRDY (input floating).
* PE3 - L3GD20_CS_SPI (output pushpull maximum).
* PE4 - DLHC_INT1 (input floating).
* PE5 - DLHC_INT2 (input floating).
* PE6 - PIN6 (input pullup).
* PE7 - PIN7 (input pullup).
* PE8 - PIN8 (input pullup).
* PE9 - PIN9 (input pullup).
* PE10 - PIN10 (input pullup).
* PE11 - PIN11 (input pullup).
* PE12 - PIN12 (input pullup).
* PE13 - PIN13 (input pullup).
* PE14 - PIN14 (input pullup).
* PE15 - PIN15 (input pullup).
*/
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | \
PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | \
PIN_MODE_INPUT(GPIOE_DLHC_DRDY) | \
PIN_MODE_OUTPUT(GPIOE_L3GD20_CS_SPI) | \
PIN_MODE_INPUT(GPIOE_DLHC_INT1) | \
PIN_MODE_INPUT(GPIOE_DLHC_INT2) | \
PIN_MODE_INPUT(GPIOE_PIN6) | \
PIN_MODE_INPUT(GPIOE_PIN7) | \
PIN_MODE_INPUT(GPIOE_PIN8) | \
PIN_MODE_INPUT(GPIOE_PIN9) | \
PIN_MODE_INPUT(GPIOE_PIN10) | \
PIN_MODE_INPUT(GPIOE_PIN11) | \
PIN_MODE_INPUT(GPIOE_PIN12) | \
PIN_MODE_INPUT(GPIOE_PIN13) | \
PIN_MODE_INPUT(GPIOE_PIN14) | \
PIN_MODE_INPUT(GPIOE_PIN15))
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) | \
PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) | \
PIN_OTYPE_PUSHPULL(GPIOE_DLHC_DRDY) | \
PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_CS_SPI) | \
PIN_OTYPE_PUSHPULL(GPIOE_DLHC_INT1) | \
PIN_OTYPE_PUSHPULL(GPIOE_DLHC_INT2) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_L3GD20_INT1) | \
PIN_OSPEED_HIGH(GPIOE_L3GD20_INT2) | \
PIN_OSPEED_HIGH(GPIOE_DLHC_DRDY) | \
PIN_OSPEED_HIGH(GPIOE_L3GD20_CS_SPI) | \
PIN_OSPEED_HIGH(GPIOE_DLHC_INT1) | \
PIN_OSPEED_HIGH(GPIOE_DLHC_INT2) | \
PIN_OSPEED_HIGH(GPIOE_PIN6) | \
PIN_OSPEED_HIGH(GPIOE_PIN7) | \
PIN_OSPEED_HIGH(GPIOE_PIN8) | \
PIN_OSPEED_HIGH(GPIOE_PIN9) | \
PIN_OSPEED_HIGH(GPIOE_PIN10) | \
PIN_OSPEED_HIGH(GPIOE_PIN11) | \
PIN_OSPEED_HIGH(GPIOE_PIN12) | \
PIN_OSPEED_HIGH(GPIOE_PIN13) | \
PIN_OSPEED_HIGH(GPIOE_PIN14) | \
PIN_OSPEED_HIGH(GPIOE_PIN15))
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_L3GD20_INT1) | \
PIN_PUPDR_FLOATING(GPIOE_L3GD20_INT2) | \
PIN_PUPDR_FLOATING(GPIOE_DLHC_DRDY) | \
PIN_PUPDR_FLOATING(GPIOE_L3GD20_CS_SPI) | \
PIN_PUPDR_FLOATING(GPIOE_DLHC_INT1) | \
PIN_PUPDR_FLOATING(GPIOE_DLHC_INT2) | \
PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
PIN_PUPDR_PULLUP(GPIOE_PIN15))
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | \
PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | \
PIN_ODR_HIGH(GPIOE_DLHC_DRDY) | \
PIN_ODR_HIGH(GPIOE_L3GD20_CS_SPI) | \
PIN_ODR_HIGH(GPIOE_DLHC_INT1) | \
PIN_ODR_HIGH(GPIOE_DLHC_INT2) | \
PIN_ODR_HIGH(GPIOE_PIN6) | \
PIN_ODR_HIGH(GPIOE_PIN7) | \
PIN_ODR_HIGH(GPIOE_PIN8) | \
PIN_ODR_HIGH(GPIOE_PIN9) | \
PIN_ODR_HIGH(GPIOE_PIN10) | \
PIN_ODR_HIGH(GPIOE_PIN11) | \
PIN_ODR_HIGH(GPIOE_PIN12) | \
PIN_ODR_HIGH(GPIOE_PIN13) | \
PIN_ODR_HIGH(GPIOE_PIN14) | \
PIN_ODR_HIGH(GPIOE_PIN15))
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | \
PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | \
PIN_AFIO_AF(GPIOE_DLHC_DRDY, 0U) | \
PIN_AFIO_AF(GPIOE_L3GD20_CS_SPI, 0U) | \
PIN_AFIO_AF(GPIOE_DLHC_INT1, 0U) | \
PIN_AFIO_AF(GPIOE_DLHC_INT2, 0U) | \
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
PIN_AFIO_AF(GPIOE_PIN7, 0U))
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
PIN_AFIO_AF(GPIOE_PIN15, 0U))
/*
* GPIOF setup:
*
* PF0 - PIN0 (input pullup).
* PF1 - PIN1 (input pullup).
* PF2 - PIN2 (input pullup).
* PF3 - PIN3 (input pullup).
* PF4 - PIN4 (input pullup).
* PF5 - PIN5 (input pullup).
* PF6 - PIN6 (input pullup).
* PF7 - PIN7 (input pullup).
* PF8 - PIN8 (input pullup).
* PF9 - PIN9 (input pullup).
* PF10 - PIN10 (input pullup).
* PF11 - PIN11 (input pullup).
* PF12 - PIN12 (input pullup).
* PF13 - PIN13 (input pullup).
* PF14 - PIN14 (input pullup).
* PF15 - PIN15 (input pullup).
*/
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
PIN_MODE_INPUT(GPIOF_PIN1) | \
PIN_MODE_INPUT(GPIOF_PIN2) | \
PIN_MODE_INPUT(GPIOF_PIN3) | \
PIN_MODE_INPUT(GPIOF_PIN4) | \
PIN_MODE_INPUT(GPIOF_PIN5) | \
PIN_MODE_INPUT(GPIOF_PIN6) | \
PIN_MODE_INPUT(GPIOF_PIN7) | \
PIN_MODE_INPUT(GPIOF_PIN8) | \
PIN_MODE_INPUT(GPIOF_PIN9) | \
PIN_MODE_INPUT(GPIOF_PIN10) | \
PIN_MODE_INPUT(GPIOF_PIN11) | \
PIN_MODE_INPUT(GPIOF_PIN12) | \
PIN_MODE_INPUT(GPIOF_PIN13) | \
PIN_MODE_INPUT(GPIOF_PIN14) | \
PIN_MODE_INPUT(GPIOF_PIN15))
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \
PIN_OSPEED_HIGH(GPIOF_PIN1) | \
PIN_OSPEED_HIGH(GPIOF_PIN2) | \
PIN_OSPEED_HIGH(GPIOF_PIN3) | \
PIN_OSPEED_HIGH(GPIOF_PIN4) | \
PIN_OSPEED_HIGH(GPIOF_PIN5) | \
PIN_OSPEED_HIGH(GPIOF_PIN6) | \
PIN_OSPEED_HIGH(GPIOF_PIN7) | \
PIN_OSPEED_HIGH(GPIOF_PIN8) | \
PIN_OSPEED_HIGH(GPIOF_PIN9) | \
PIN_OSPEED_HIGH(GPIOF_PIN10) | \
PIN_OSPEED_HIGH(GPIOF_PIN11) | \
PIN_OSPEED_HIGH(GPIOF_PIN12) | \
PIN_OSPEED_HIGH(GPIOF_PIN13) | \
PIN_OSPEED_HIGH(GPIOF_PIN14) | \
PIN_OSPEED_HIGH(GPIOF_PIN15))
#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \
PIN_PUPDR_PULLUP(GPIOF_PIN1) | \
PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
PIN_PUPDR_PULLUP(GPIOF_PIN15))
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \
PIN_ODR_HIGH(GPIOF_PIN1) | \
PIN_ODR_HIGH(GPIOF_PIN2) | \
PIN_ODR_HIGH(GPIOF_PIN3) | \
PIN_ODR_HIGH(GPIOF_PIN4) | \
PIN_ODR_HIGH(GPIOF_PIN5) | \
PIN_ODR_HIGH(GPIOF_PIN6) | \
PIN_ODR_HIGH(GPIOF_PIN7) | \
PIN_ODR_HIGH(GPIOF_PIN8) | \
PIN_ODR_HIGH(GPIOF_PIN9) | \
PIN_ODR_HIGH(GPIOF_PIN10) | \
PIN_ODR_HIGH(GPIOF_PIN11) | \
PIN_ODR_HIGH(GPIOF_PIN12) | \
PIN_ODR_HIGH(GPIOF_PIN13) | \
PIN_ODR_HIGH(GPIOF_PIN14) | \
PIN_ODR_HIGH(GPIOF_PIN15))
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \
PIN_AFIO_AF(GPIOF_PIN1, 0U) | \
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
PIN_AFIO_AF(GPIOF_PIN7, 0U))
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \