From c7fb24faeab9074112a1800984efd10cf89e33c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Sebastian=20G=C5=82=C4=85b?= Date: Tue, 5 Nov 2024 13:06:38 +0100 Subject: [PATCH] tests: benchmarks: multicore: idle_spim_loopback: Disable GD2 and GD3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This commit shall be dropped when GD handling is implemented in sdk-zephyr. Signed-off-by: Sebastian Głąb --- .../idle_spim_loopback/prj_s2ram.conf | 1 + .../multicore/idle_spim_loopback/src/main.c | 53 +++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/tests/benchmarks/multicore/idle_spim_loopback/prj_s2ram.conf b/tests/benchmarks/multicore/idle_spim_loopback/prj_s2ram.conf index 85c58943a65..0107350c6ed 100644 --- a/tests/benchmarks/multicore/idle_spim_loopback/prj_s2ram.conf +++ b/tests/benchmarks/multicore/idle_spim_loopback/prj_s2ram.conf @@ -18,3 +18,4 @@ CONFIG_SERIAL=n CONFIG_SPI=y CONFIG_ASSERT=y +CONFIG_NRFS=y diff --git a/tests/benchmarks/multicore/idle_spim_loopback/src/main.c b/tests/benchmarks/multicore/idle_spim_loopback/src/main.c index 8e321d78d9d..1bdf7008b3a 100644 --- a/tests/benchmarks/multicore/idle_spim_loopback/src/main.c +++ b/tests/benchmarks/multicore/idle_spim_loopback/src/main.c @@ -12,6 +12,9 @@ LOG_MODULE_REGISTER(idle_spim_loopback, LOG_LEVEL_INF); #include #include +#include +#include + #define SPI_MODE (SPI_OP_MODE_MASTER | SPI_WORD_SET(8) | SPI_LINES_SINGLE | SPI_TRANSFER_MSB \ | SPI_MODE_CPHA | SPI_MODE_CPOL) @@ -37,6 +40,53 @@ void my_timer_handler(struct k_timer *dummy) timer_expired = true; } +/* Required to power off the GD2 and GD3 domains + * Will be removed when GD handling + * is implemented in sdk-zephyr + */ +static void gdpwr_handler(nrfs_gdpwr_evt_t const *p_evt, void *context) +{ + switch (p_evt->type) { + case NRFS_GDPWR_REQ_APPLIED: + printk("GDPWR handler - response received: 0x%x, CTX=%d\n", p_evt->type, + (uint32_t)context); + break; + case NRFS_GDPWR_REQ_REJECTED: + printk("GDPWR handler - request rejected: 0x%x, CTX=%d\n", p_evt->type, + (uint32_t)context); + break; + default: + printk("GDPWR handler - unexpected event: 0x%x, CTX=%d\n", p_evt->type, + (uint32_t)context); + break; + } +} + +/* Required to power off the GD2 and GD3 domains + * Will be removed when GD handling + * is implemented in sdk-zephyr + */ +static void clear_global_power_domains_requests(void) +{ + int service_status; + int tst_ctx = 1; + + service_status = nrfs_gdpwr_init(gdpwr_handler); + printk("Response: %d\n", service_status); + printk("Sending GDPWR DISABLE request for: GDPWR_POWER_DOMAIN_ACTIVE_SLOW\n"); + service_status = nrfs_gdpwr_power_request(GDPWR_POWER_DOMAIN_ACTIVE_SLOW, + GDPWR_POWER_REQUEST_CLEAR, (void *)tst_ctx++); + printk("Response: %d\n", service_status); + printk("Sending GDPWR DISABLE request for: GDPWR_POWER_DOMAIN_ACTIVE_FAST\n"); + service_status = nrfs_gdpwr_power_request(GDPWR_POWER_DOMAIN_ACTIVE_FAST, + GDPWR_POWER_REQUEST_CLEAR, (void *)tst_ctx++); + printk("Response: %d\n", service_status); + printk("Sending GDPWR DISABLE request for: GDPWR_POWER_DOMAIN_MAIN_SLOW\n"); + service_status = nrfs_gdpwr_power_request(GDPWR_POWER_DOMAIN_MAIN_SLOW, + GDPWR_POWER_REQUEST_CLEAR, (void *)tst_ctx); + printk("Response: %d\n", service_status); +} + int main(void) { int ret; @@ -50,6 +100,9 @@ int main(void) struct spi_buf rx_spi_buf = {.buf = &spim_buffer[16], .len = DATA_FIELD_LEN}; struct spi_buf_set rx_spi_buf_set = {.buffers = &rx_spi_buf, .count = 1}; + nrfs_backend_wait_for_connection(K_FOREVER); + clear_global_power_domains_requests(); + LOG_INF("%s runs as a SPI HOST", CONFIG_BOARD_TARGET); ret = spi_is_ready_dt(&spim_spec);