diff --git a/hardware/src/ara_dispatcher.sv b/hardware/src/ara_dispatcher.sv
index dd02b2198..e89658ef7 100644
--- a/hardware/src/ara_dispatcher.sv
+++ b/hardware/src/ara_dispatcher.sv
@@ -637,8 +637,9 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
                   end
                   6'b011000: begin
                     ara_req_d.op         = ara_pkg::VMSEQ;
-                    ara_req_d.eew_vs1    = eew_q[ara_req_d.vs2];
-                    ara_req_d.eew_vs2    = eew_q[ara_req_d.vs2];
+                    ara_req_d.use_vd_op  = 1'b1;
+                    ara_req_d.eew_vs1    = csr_vtype_q.vsew;
+                    ara_req_d.eew_vs2    = csr_vtype_q.vsew;
                     ara_req_d.eew_vd_op  = eew_q[ara_req_d.vd];
                     ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
                   end
@@ -864,9 +865,10 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
                     endcase
                   end
                   6'b011000: begin
-                    ara_req_d.op        = ara_pkg::VMSEQ;
-                    ara_req_d.eew_vs1    = eew_q[ara_req_d.vs2];
-                    ara_req_d.eew_vs2    = eew_q[ara_req_d.vs2];
+                    ara_req_d.op         = ara_pkg::VMSEQ;
+                    ara_req_d.use_vd_op  = 1'b1;
+                    ara_req_d.eew_vs1    = csr_vtype_q.vsew;
+                    ara_req_d.eew_vs2    = csr_vtype_q.vsew;
                     ara_req_d.eew_vd_op  = eew_q[ara_req_d.vd];
                     ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
                   end
@@ -1038,9 +1040,10 @@ module ara_dispatcher import ara_pkg::*; import rvv_pkg::*; #(
                     endcase
                   end
                   6'b011000: begin
-                    ara_req_d.op        = ara_pkg::VMSEQ;
-                    ara_req_d.eew_vs1    = eew_q[ara_req_d.vs2];
-                    ara_req_d.eew_vs2    = eew_q[ara_req_d.vs2];
+                    ara_req_d.op         = ara_pkg::VMSEQ;
+                    ara_req_d.use_vd_op  = 1'b1;
+                    ara_req_d.eew_vs1    = csr_vtype_q.vsew;
+                    ara_req_d.eew_vs2    = csr_vtype_q.vsew;
                     ara_req_d.eew_vd_op  = eew_q[ara_req_d.vd];
                     ara_req_d.vtype.vsew = eew_q[ara_req_d.vd];
                   end
diff --git a/hardware/src/lane/lane_sequencer.sv b/hardware/src/lane/lane_sequencer.sv
index c2c8c1d14..55581bc77 100644
--- a/hardware/src/lane/lane_sequencer.sv
+++ b/hardware/src/lane/lane_sequencer.sv
@@ -259,6 +259,7 @@ module lane_sequencer import ara_pkg::*; import rvv_pkg::*; import cf_math_pkg::
         vtype          : pe_req.vtype,
         default        : '0
       };
+      vfu_operation_d.vtype.vsew = pe_req.op inside {[VMFEQ:VMSGT]} ? pe_req.eew_vs2 : pe_req.vtype.vsew;
       vfu_operation_valid_d = (vfu_operation_d.vfu != VFU_None) ? 1'b1 : 1'b0;
 
       // Vector length calculation
diff --git a/hardware/src/masku/masku.sv b/hardware/src/masku/masku.sv
index cce254c02..238b0cef8 100644
--- a/hardware/src/masku/masku.sv
+++ b/hardware/src/masku/masku.sv
@@ -1205,7 +1205,7 @@ module masku import ara_pkg::*; import rvv_pkg::*; #(
             // Mask to mask - encoded
             delta_elm_d = NrLanes << (EW64 - pe_req_i.eew_vs2[1:0]);
 
-            in_ready_threshold_d   = 1;
+            in_ready_threshold_d   = 0;
             in_m_ready_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
             out_valid_threshold_d  = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
           end
@@ -1213,7 +1213,7 @@ module masku import ara_pkg::*; import rvv_pkg::*; #(
             // Mask to mask - encoded
             delta_elm_d = NrLanes << (EW64 - pe_req_i.eew_vs2[1:0]);
 
-            in_ready_threshold_d   = 1;
+            in_ready_threshold_d   = 0;
             in_m_ready_threshold_d = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
             out_valid_threshold_d  = (DataWidth >> (EW64 - pe_req_i.eew_vs2[1:0]))-1;
           end