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Thanks for the answer
I want to add a custom vector isa
Currently I have defined the custom instruction and have a riscv bin file containing it, which has been compiled to the compiler.
I hope to modify the ara to implement hw that supports it.
However, my custom hardware uses data from both neighbouring vector lanes.
Please see the image below I would like to start by designing a module that switches data from neighbouring vector lanes as shown below
I don't know how to modify it in this situation, can you give me a guide?
Also, I heard that in Ideal Dispatcher mode, cva6 treats it as a simple FIFO. Is it possible to work in my case without modifying the cva6 decoder, just modifying the ARA?
Hey guys,
I'm a master student from Korea working on RVV custom ISA.
I am now trying to add my designed custom ISA to ara.
How can I add my custom ISA?
Is there anyone who can give me some good advice?
Because I have no idea how to go about it.
Sorry and thanks
�Best regards
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