prdata_i declaration in axi_lite_to_apb.sv is incorrect

[abhi9891]

Is this correct way to declare? Seems like below is wrong as per SV rule. Correct me if I am missing something.
input data_t [NoApbSlaves-1:0] prdata_i;

Correct way of declaration
input logic [NoApbSlaves-1:0] [AXI_DATA_WIDTH-1:0] prdata_i;

Here data_t = logic [AXI_DATA_WIDTH-1:0]

@WRoenninger @andreaskurth @SamuelRiedel
// - Wolfgang Roenninger [email protected]
// - Andreas Kurth [email protected]
// - Samuel Riedel [email protected]