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TESTINS2.MLC
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TESTINS2.MLC
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*********************************************************************
* Copyright 2005 Automated Software Tools Corporation *
* This source code is part of z390 assembler/emulator package *
* The z390 package is distributed under GNU general public license *
* Author - Don Higgins *
* Date - 09/30/05 *
*********************************************************************
* MAINTENANCE
* 10/05/05 RPI5 MAKE ASCII MODE AWARE USING X'A0' BIGH BIT ASCII SP
* 10/17/05 ADD CLST, CUSE, AND SRST STRING INSTRUCTIONS
* 10/22/05 RPI44 FIX TM TO SET CC3 IF OR'D BYTE = MASK VS MEMORY
* 10/23/05 RPI43 FIX ED AND EDMK SIGNIFICANCE 1 DIGIT EARLY
* 10/26/05 RPI49 FIX D TEST TO USE REG PAIR LIKE DR ALEADY DOES
* 11/02/05 RPI69 REMOVE ED/EDMK MASK CHANGES FOR ASCII NOT NEEDED
* 11/03/05 RPI65 ADD TEST FOR BALR, BASR, BASSM WITH R1=R2
* 11/07/05 RPI73 ADD TESTS FOR C!..! AND HEX MASK, PKA, UNPKA
* 11/11/05 RPI73 UPDATE UNPK TESTS FOR ASCII MODE SUPPORT
* 11/11/05 RPI82 ADD TESTS FOR MVC WITH OVERLAP AT +1 AND +2
* 11/20/05 RPI106 UPDATE TESTS FOR SPM, IPM, NR, OR, XR, AND PC/PR
* 11/23/05 RPI109 ADD PD TESTS FOR OPTIMIZED PD USING INT VS BIGINT
* 12/08/05 RPI120 ADD SRP TEST OF EXPLICIT BDDD2
* 01/07/06 RPI158 - CLEAR REMAINING BITS IN LLIHH LLIHL LLILH LLILL
* 01/08/06 RPI160 - CORRECT LLGT WHICH WAS LOADING FROM LOC+4
* 01/11/06 RPI166 TEST SRAG 1,2,3(4) AND TMY 1(2),3 USING BASE REG
* 01/15/06 RPI173 ADD LRV, STPQ, and LPQ
* 01/15/06 RPI174 CORRECT ALC?? AND SLB?? CC0 CARRY ERRORS
* 02/04/06 RPI185 ADD MISSING EXTENDED BRNNCH AND Z9 OPCODES
* 02/08/06 RPI185 ADD Z9 INSTUCTIONS (SEE TESTFP1 FOR FP INSTR)
* PTFF, STCKF (FIX STCK TO BE UNIQUE), STFLE
* LGBR, LGBR, LGHR, LBR, LHR, FLOGR
* LLGCR, LLGHR, LLCR, LLHR, LGFI, XIHF, XILF
* IIHF, IILF, NIHF, NILF, OIHF, OILF
* LLIHF, LLILF, SLGFI, SLFI
* AGFI, AFI, ALGFI, ALFI, CGFI, CFI, CLGFI, CLFI
* LTG, LT, LLC, LLH
* 02/10/06 RPI199 ADD EXTENDED BRANCH BRCL INSTRUCTIONS
* 04/01/06 ADD 32 * 32 = 64 BIT TEST OF MR
* 04/05/06 ADD 32 * 32 = 64 BIT TEST OF MR AND VERIFY R1 IGNORED
* 04/07/06 ADD 32 * 32 = 64 BIT TEST OF MLR AND ML
* 04/23/06 RPI 295 ADD ADDITIONAL TESTS FOR ICM AND OIHL
* 04/28/06 RPI 303 ADD ADDITIONAL TESTS FOR ICM TO SET HIGH IF POS
* 05/02/06 RPI 305 USE NEW ESPIE AND ESTAE CONTROL BLOCKS
* 07/20/06 RPI 376 TEST ALR CC=1 WHEN HIGH BIT TURNED ON AND NO CARRY
* 07/24/06 RPI 383 CORRECT TESTS FOR MLG AND MLGR TO USE R1+1 * S2/R2
* 08/06/06 RPI 398 CORRECT TESTS FOR D AND DR TO INCLUDE 64 BITS
* 09/08/06 RPI 441 ADD TEST FOR MVST MOVE STRING AND UPDATE TP TESTS
* 09/19/06 RPI 454 ADD TEST FOR TRE, TROO, TROT, TRTO, TRTT
* 11/10/06 RPI 476 ADD CC TEST FOR MVST ALONG WITH SPEEDUP
* 03/18/07 RPI 580 CORRECT TEST CHAR FOR TR??
* 05/07/07 RPI 606 add MVCOS tests
* 06/10/07 RPI 636 set ESTAE required exit RC=4 for restart request
* 02/27/08 RPI 815 correct support for negative index register 24/31
* 03/12/08 RPI 820 test fix to prevent S0C5 on negative SRP b2 reg
* 03/15/08 RPI 823 correct test for MVCIN using right most source addr
* 03/28/08 RPI 828 test clearing high bit in AMODE31 for TRT/EDMK
* 03/28/08 RPI 831 test SLR, SLGR, SLGFR, SL, SLY, SLG, SLGF FOR CC1
* WHEN BORROW FOR TWO VALUES WITH HIGH BIT ON.
* 06/07/08 RPI 844 corrections for compatibility with z9,z10 tests
* 1) Align TROO, TROT, TRTO, TRTT table to dword else 0C4
* 2) TMHH, TMHL, TMLH, TMLL set CC1 high sel bit 0 else cc2
* 3) FORCE AMODE31 WITH SAM31 FOR TRT TEST ON Z9/Z10
* 4) CORRECT TESTS FOR TMY MIXED
* 5) RECODE LMD TEST USING DC VS LITERALS FOR HLASM COMPAT.
* 6) ISSUE S0C7 ABEND FOR X'3' PD SIGN UNLESS OPTION ASCII
* 7) ALIGN REGS ON 16 BYTE BOUNDARY TO ELIM. HLASM WARNING
* 06/09/08 RPI 859 move MVCOS updated test to TESTINS3 removing overlap
* 2) Set R0 to 7 for STFLE store faciliies.
* 06/17/08 RPI 845 change EPIED to IHAEPIE (NOTE ESPIEPSW OFFSET CHG)
* 06/21/08 RPI 845 change ESTAD to IHASDWA and remove ESTAPSW ref.
* 07/05/08 RPI 875 correct test for CLIY bug introduced by RPI 859
* 07/08/08 RPI 875 add missing test for ALY, LTGF, CGH,MFY,MHY,
* ASI, ALSI, AGSI, ALGSI
* 07/23/08 RPI 879 test SLR, SLGR, SLGFR, SL, SLY, SLG, SLGF
* FOR CC3 NZ,NB WHEN BOTH SIGNS MEG AND S1 > S2
* 04/20/09 RPI 1026 ADD TEST FOR ESTA, EREG, EREGG
* 06/15/09 RPI 1055 ADD CPYA, SAR, and EAR support for AR registers
* 02/25/10 RPI 1111 CORRECT PR TO ONLY RESTORE 2-14 (WAS 1-14)
* 12/18/10 RPI 1125 FIX ALSI AND ALGSI TO SET BORROW ON NEG ADD
* 04/02/12 RPI 1200 TEST LRVGR AND LRVR WITH SAME REG
* 04/04/13 RPI 1125 removed to correct ALSI/ALGSI cond codes
*********************************************************************
TITLE 'TESTINS2 - UNIT TEST EACH EZ390 INSTRUCTION SUPPORTED'
* THIS PROGRAM INCLUDES UNIT TESTS OF EACH INSTRUCTION
* ADDED TO EZ390.JAVA J2SE 390 EMULATOR.
*
* RT1 MACRO USED TO AUTOMATE CODE GENERATED FOR MAINLINE
* AND TEST PSW CC ROUTINES. THE MACROS DEFINE NEW BASE REG
* FOR EACH TEST SO THEY CAN EXTEND FOR ANY LENGTH.
*
* SEE TESTFP1 FOR HFP AND BFP FLOATING POINT INSTR TESTS
*********************************************************************
TESTINS2 RT1 MAIN
EQUREGS
ESPIE_EXIT DS 0H
USING *,R15
USING EPIE,R1 RPI 845 NEW DSECT NAME
L R0,EPIEPSW+4 Load ESPIE old PSW
N R0,=X'80000000' Preserve AMODE 31 if set
O R0,EPIEPARM
ST R0,EPIEPSW+4
BR R14
DROP R15,R1
ESTAE_EXIT DS 0H
USING *,R15
USING SDWA,R1
L R0,SDWAPARM RPI 845 USE SDWA PARM VS ESTAD
LA R15,4 REQUEST RESTART RPI 636
BR R14
DROP R15,R1
LMD1 DC 0D,X'01234567',X'01234567' RPI 844
LMD2 DC 0D,X'89ABCDEF',X'89ABCDEF' RPI 844
CNOP 8,16 RPI 844 PREVENT STPQ WARNING MESSAGE
PWORK DS D
PWORK16 DS XL16
DWORD DS D
PL1 DS PL1
WORD DS F
BYTE DS X
CNOP 0,16 RPI 844 PREVENT CDS WARNING MESSAGE
REGS DS XL(16*8)
EBNMIN DC EB'1.17549435E-38'
EBDMIN DC A(X'00000001') EB'1.4E-45'
FPCREG DC A(X'70000000') BFP CONTROL REG WITH MASKS AND DXC CODE
FPCDXC EQU FPCREG+2 REASON CODES FOR 0C7 DATA EXCEPTIONS
SVC35 DC AL2(SVC35END-*,0),C'TEST SVC 35 OK'
SVC35END EQU *
ESTACC DC X'00'
ESTAPSW DC 2F'0'
EREGSAVE DC XL8'00'
EREGGSAV DC 2D'0'
KEY DC C'EFE'
PAD DC C' '
STRING1 DC C'CABCBFDEFEAB'
STRING2 DC C'ACBABBCEFEAB'
STRING3 DC C'1234',X'00'
STRING4 DC C'ABCD',X'EE'
&ZONE SETC 'F' EBCDIC ZONE FOR DIGITS
AIF (C'A' EQ X'C1').SKIP_ASCII_MODE
&ZONE SETC '3' ASCII ZONE FOR DIGITS
.SKIP_ASCII_MODE ANOP
NEGMASK DC CE' ',X'202020',CE'- ' BI-MODAL EBCDIC MASK
TREEOD EQU X'EE' TRE EOD TEST BYTE
TRETAB DC 240X'FF',CE'ABCD',12X'FF' TRE TRANS TAB 0123 > ABCD
TREF1 DC CE'0123'
TREV1 DC CE'ABCD'
TREF2 DC X'F0F1EEF3' EOD IN 3RD BYTE
TREV2 DC X'C1C2EEF3'
TROOEOD EQU X'C3' TROO EOD TEST BYTE RPI 580
* RPI 844 ALIGN TROOTAB, TROTTAB, TRTTTAB TO DOUBLE WORK
TROOTAB DC 0D,240X'FF',CE'ABCD',12X'FF' TROO TRANS TAB 0123 > ABCD
TROOF1 DC CE'9999'
TROOF1V1 DC X'C1C2C3C4' RESULT WITH NO TESTING FOR 4 BYTES
TROOF1V2 DC X'C1C2F9F9' RESULT WITH TESTING STOP ON 3RD BYTE
TROOF2 DC X'F0F1F2F3'
TROTEOD EQU X'C3C3' TROO EOD TEST BYTE RPI 580
TROTTAB DC 0D,240X'FFFF',CE'AABBCCDD',12X'FFFF' (F0 * 2 > C1C1) ETC
TROTF1 DC CE'99999999'
TROTF1V1 DC X'C1C1C2C2C3C3C4C4' RESULT WITH NO TESTING FOR 4 BYTES
TROTF1V2 DC X'C1C1C2C2F9F9F9F9' RESULT WITH STOP ON 3RD BYTE
TROTF2 DC X'F0F1F2F3'
TRTOEOD EQU X'C3' TROO EOD TEST BYTES RPI 580
TRTOTAB DC 0D,128X'FFFF',CE'ABCD' (X'0100' > C'A' ETC
TRTOF1 DC CE'9999'
TRTOF1V1 DC CE'ABCD' RESULT WITH NO TESTING FOR 4 BYTES
TRTOF1V2 DC CE'AB99' RESULT WITH STOP ON 3RD BYTE
TRTOF2 DC X'0100010101020103'
TRTTEOD EQU X'C3C3' TROO EOD TEST BYTES RPI 580
TRTTTAB DC 0D,256X'FFFF',CE'AABBCCDD' (X'0100' > C'AA' ETC
TRTTF1 DC CE'99999999'
TRTTF1V1 DC CE'AABBCCDD' RESULT WITH NO TESTING
TRTTF1V2 DC CE'AABB9999' RESULT WITH STOP ON 3RD ENTRY
TRTTF2 DC X'0100010101020103' EOD IN 3RD ENTRY
* START TESTS
RT1 START
AGO .NOPRTST <== Bypass PC/PR linkage test
* 0101 PR
LA 0,1
LA 1,1
LMG 2,3,=A(111,222,333,444)
LA 14,1
LA 15,1
PC PR1
PCRET1 EQU *
CHI 0,2
RT1 CCE
CHI 1,2 RPI 1111 WAS 1 VS 2
RT1 CCE
CHI 14,1
RT1 CCE
CHI 15,2
RT1 CCE
B PR2
RT1 ABORT
PR1 EQU *
BALR 2,0
USING *,2
WTO 'PR1 SUB CALLED'
LA 2,1 REQUEST PSW @20130401
ESTA 0,2 EXTRACT RETURN PSW INTO R0-R1 RPI 1026
MVI ESTACC,0
JZ *+8
MVI ESTACC,1
STM 0,1,ESTAPSW
SGR 2,2
SGR 3,3
EREG 2,3
STM 2,3,EREGSAVE
SGR 2,2
SGR 3,3
EREGG 2,3
STMG 2,3,EREGGSAV
LA 0,2
LA 1,2
LA 14,2
LA 15,2
PR
DROP 2
PR2 EQU *
CLI ESTACC,1 PC TYPE
RT1 CCE
CLC ESTAPSW+4(4),=A(PCRET1) @20130401
RT1 CCE RPI 1026
CLC EREGSAVE,=A(222,444)
RT1 CCE
CLC EREGGSAV,=A(111,222,333,444)
RT1 CCE
.NOPRTST ANOP
* 010C SAM24
SAM24
L 1,=A(X'FFFFFF')
LA 1,1(1)
CL 1,=A(0)
RT1 CCE
* 010D SAM31
SAM31
L 1,=A(X'FFFFFF')
LA 1,1(1)
CL 1,=A(X'01000000')
RT1 CCE
* 04 SPM
L R0,=X'3F000000'
SPM R0
RT1 CC3
SR R0,R0
AHI R0,1
IPM R0
CLM R0,8,=X'2F'
RT1 CCE
* 05 BALR
BALR R1,0
BALR1 EQU *
NILH R1,X'7FFF'
ST R1,WORD
RT1 CCE,WORD,=A(BALR1)
LA R2,BALR3
BALR R1,R2
BALR2 EQU *
RT1 ABORT
BALR3 EQU *
RT1 OK
NILH R1,X'7FFF'
ST R1,WORD
RT1 CCE,WORD,=A(BALR2)
LA R1,*+6
BALR R1,R1
CLM R1,7,=AL3(*)
RT1 CCE
* 06 BCTR
LA R1,2
BCTR R1,0
CL R1,=F'1'
RT1 CCE
* 07 BCR
LA R3,BCRERR
B BCROK
BCRERR RT1 ABORT
BCROK EQU *
NOPR R3
CLI =X'1',1
BNER R3
CLI =X'1',2
BNLR R3
BER R3
CLI =X'2',1
BNHR R3
BER R3
* 0A SVC
LA R1,SVC35
SVC 35
* 0B BSM
LA R0,0
BSM R0,R0
CL R0,=F'0'
RT1 CCE
LA R1,0
BSM R1,R0
CL R1,=X'80000000'
RT1 CCE
LA R2,BSM1
BSM R1,R2 SWITCH TO AMODE24
RT1 ABORT
BSM1 EQU *
RT1 OK
CL R1,=X'80000000' VERIFY WAS AMODE31
RT1 CCE
LA R1,0
BSM R1,R0
CL R1,=X'00000000' VERIFY NOW AMODE24
RT1 CCE
LA R2,BSM2
OILH R2,X'8000'
BSM R1,R2 SWITCH TO AMODE31
RT1 ABORT
BSM2 EQU *
RT1 OK
CL R1,=X'00000000' VERIFY WAS AMODE24
RT1 CCE
LA R1,0
BSM R1,R0
CL R1,=X'80000000' VERIFY NOW AMODE31
RT1 CCE
* 0C BASSM
BASSM R1,0
BASSM1 EQU *
NILH R1,X'7FFF'
ST R1,WORD
RT1 CCE,WORD,=A(BASSM1)
LA R2,BASSM3
BASSM R1,R2 SWITCH TO AMODE24
BASSM2 EQU *
RT1 ABORT
BASSM3 EQU *
RT1 OK
ST R1,WORD
RT1 CCE,WORD,=A(BASSM2+X'80000000') VER WAS AMODE31 BEFORE
L R2,=A(BASSM5+X'80000000')
BASSM R1,R2 SWITCH BACK TO AMODE31
BASSM4 EQU *
RT1 ABORT
BASSM5 EQU *
RT1 OK
CL R1,=A(BASSM4)
RT1 CCE
L R1,=X'00FFFFFF'
LA R1,1(R1)
CL R1,=X'01000000'
RT1 CCE
LA R1,*+10
OILH R1,X'8000'
BASSM R1,R1
CLM R1,7,=AL3(*)
RT1 CCE
* 0D BASR
BASR R1,0
BASR1 EQU *
NILH R1,X'7FFF'
ST R1,WORD
RT1 CCE,WORD,=A(BASR1)
LA R2,BASR3
BASR R1,R2
BASR2 EQU *
RT1 ABORT
BASR3 EQU *
RT1 OK
NILH R1,X'7FFF'
ST R1,WORD
RT1 CCE,WORD,=A(BASR2)
LA R1,*+6
BASR R1,R1
CLM R1,7,=AL3(*)
RT1 CCE
* 0E MVCL
MVC WORD,=C'1234'
MVC PWORK(4),=C'ABCD'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,4)
MVCL R0,R2
RT1 CCE
CLC WORD,=C'ABCD'
RT1 CCE
CL R0,=A(WORD+4)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+4)
RT1 CCE
CL R3,=A(0)
RT1 CCE
MVC WORD,=C'1234'
MVC PWORK(4),=C'ABXX'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,2)
ICM R3,8,=C' '
MVCL R0,R2
RT1 CCH
CL R0,=A(WORD+4)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+2)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(0)
RT1 CCE
CLC WORD,=C'AB '
RT1 CCE
MVC WORD,=C'1234'
MVC PWORK(4),=C'ABCX'
LM R0,R1,=A(WORD,3)
LM R2,R3,=A(PWORK,4)
ICM R3,8,=C' '
MVCL R0,R2
RT1 CCL
CL R0,=A(WORD+3)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+3)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(1)
RT1 CCE
CLC WORD,=C'ABC4'
RT1 CCE
* 0F CLCL
MVC WORD,=C'ABCD'
MVC PWORK(4),=C'ABCD'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,4)
CLCL R0,R2
RT1 CCE
CL R0,=A(WORD+4)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+4)
RT1 CCE
CL R3,=A(0)
RT1 CCE
MVC WORD,=C'AB '
MVC PWORK(4),=C'ABXX'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,2)
ICM R3,8,=C' '
CLCL R0,R2
RT1 CCE
CL R0,=A(WORD+4)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+2)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(0)
RT1 CCE
MVC WORD,=C'ABC4'
MVC PWORK(4),=C'ABC '
LM R0,R1,=A(WORD,3)
LM R2,R3,=A(PWORK,4)
ICM R3,8,=C' '
CLCL R0,R2
RT1 CCE
CL R0,=A(WORD+3)
RT1 CCE
CL R1,=A(0)
RT1 CCE
CL R2,=A(PWORK+4)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(0)
RT1 CCE
MVC WORD,=C'AB '
MVC PWORK(4),=C'ACXX'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,2)
ICM R3,8,=C' '
CLCL R0,R2
RT1 CCL
CL R0,=A(WORD+1)
RT1 CCE
CL R1,=A(3)
RT1 CCE
CL R2,=A(PWORK+1)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(1)
RT1 CCE
MVC WORD,=C'AB C'
MVC PWORK(4),=C'ABXX'
LM R0,R1,=A(WORD,4)
LM R2,R3,=A(PWORK,2)
ICM R3,8,=C' '
CLCL R0,R2
RT1 CCH
CL R0,=A(WORD+3)
RT1 CCE
CL R1,=A(1)
RT1 CCE
CL R2,=A(PWORK+2)
RT1 CCE
CLM R3,8,=C' '
CLM R3,7,=AL3(0)
RT1 CCE
* 10 LPR
L R1,=F'-1'
LPR R0,R1
RT1 CCH
CL R0,=F'1'
RT1 CCE
SPM R0
L R1,=X'80000000'
LPR R0,R1
RT1 CC3
* 11 LNR
L R1,=F'1'
LNR R0,R1
RT1 CCL
CL R0,=F'-1'
RT1 CCE
* 12 LTR
L R1,=F'1'
LTR R0,R1
RT1 CCH
L R1,=F'-1'
LTR R0,R1
RT1 CCL
L R1,=F'0'
LTR R0,R1
RT1 CCE
* 13 LCR
L R1,=F'1'
LCR R0,R1
RT1 CCL
CL R0,=F'-1'
RT1 CCE
L R1,=F'-1'
LCR R0,R1
RT1 CCH
CL R0,=F'1'
RT1 CCE
L R1,=X'80000000'
LCR R0,R1
RT1 CC3
* 15 CLR
LA R1,1
LA R2,1
CLR R1,R2
RT1 CCE
LA R1,0
L R2,=F'1'
CLR R1,R2
RT1 CCL
LA R1,2
L R2,=F'1'
CLR R1,R2
RT1 CCH
L R1,=F'-1'
L R2,=F'1'
CLR R1,R2
RT1 CCH
L R1,=F'1'
L R2,=F'-1'
CLR R1,R2
RT1 CCL
* 14 NR
LA R0,X'F0'
LA R1,X'0F'
NR R0,R1
RT1 CC0
LTR R0,R0
RT1 CC0
LA R0,3
LA R1,2
NR R0,R1
RT1 CC1
CLM R0,15,=F'2'
RT1 CCE
* 16 OR
LA R0,0
LA R1,0
OR R0,R1
RT1 CC0
LTR R0,R0
RT1 CC0
LA R0,1
LA R1,2
OR R0,R1
RT1 CC1
CLM R0,15,=F'3'
RT1 CCE
* 17 XR
LA R0,X'FF'
LA R1,X'FF'
XR R0,R1
RT1 CC0
LTR R0,R0
RT1 CC0
LA R0,3
LA R1,2
XR R0,R1
RT1 CC1
CLM R0,15,=F'1'
RT1 CCE
* 18 LR
LA R0,1
LA R1,2
LR R1,R0
STC R1,BYTE
CLI BYTE,1
RT1 CCE
* 19 CR
LA R0,1
LA R1,1
CR R0,R1
RT1 CCE
LA R0,1
LA R1,2
CR R0,R1
RT1 CCL
LA R0,2
LA R1,1
CR R0,R1
RT1 CCH
* 1A AR
LA R0,1
LA R1,2
AR R0,R1
RT1 CCH
CL R0,=F'3'
RT1 CCE
ESPIE SET,ESPIE_EXIT,8,PARAM=AR1
L R0,=X'7FFFFFFF'
LA R1,1
AR R0,R1
RT1 ABORT
AR1 ESPIE RESET,=F'0'
RT1 OK
WTO 'ESPIE FOR FIXED POINT OVERFLOW OK'
ESPIE SET,ESPIE_EXIT,8,PARAM=AR2
L R0,=X'80000000'
L R1,=F'-1'
AR R0,R1
RT1 ABORT
AR2 ESPIE RESET,=F'0'
RT1 OK
WTO 'ESPIE FOR FIXED POINT OVERFLOW OK'
* 1B SR
LA R0,1
LA R1,2
SR R0,R1
RT1 CCL
CL R0,=F'-1'
RT1 CCE
ESPIE SET,ESPIE_EXIT,8,PARAM=SR1
L R0,=X'7FFFFFFF'
L R1,=F'-1'
SR R0,R1
RT1 ABORT
SR1 ESPIE RESET,=F'0'
RT1 OK
ESPIE SET,ESPIE_EXIT,8,PARAM=SR2
L R0,=X'80000000'
L R1,=F'1'
SR R0,R1
RT1 ABORT
SR2 ESPIE RESET,=F'0'
RT1 OK
* 1C MR
LA R0,1 RPI 272
LA R1,2
LA R2,5
MR R0,R2
CL R0,=F'0'
RT1 CCE
CL R1,=F'10'
RT1 CCE
LA R14,2
LA R15,3
MR R14,R14
CL R14,=F'0' RPI 272
RT1 CCE
CL R15,=F'6'
RT1 CCE
* 1D DR
LA R0,0
LA R1,13
LA R2,4
DR R0,R2
CL R0,=F'1'
RT1 CCE
CL R1,=F'3'
RT1 CCE
LM R0,R1,=FL8'1E17'
L R3,=F'1E9'
DR R0,R3
CL R0,=F'0'
RT1 CCE
CL R1,=F'1E8'
RT1 CCE
LM R0,R1,=FL8'-1E17'
L R3,=F'1E9'
DR R0,R3
CL R0,=F'0'
RT1 CCE
CL R1,=F'-1E8'
RT1 CCE
LM R0,R1,=FL8'1E17'
L R3,=F'-1E9'
DR R0,R3
CL R0,=F'0'
RT1 CCE
CL R1,=F'-1E8'
RT1 CCE
LM R0,R1,=F'1,3'
L R3,=F'4'
DR R0,R3
CL R0,=F'3'
RT1 CCE
CL R1,=FS30'1'
RT1 CCE
LM R0,R1,=F'1,3'
L R3,=F'-4'
DR R0,R3
CL R0,=F'3'
RT1 CCE
CL R1,=FS30'-1'
RT1 CCE
ESPIE SET,ESPIE_EXIT,9,PARAM=DR1
LA R2,0
DR R0,R2
RT1 ABORT
DR1 ESPIE RESET,=F'0'
RT1 OK
WTO 'ESPIE FOR FIXED POINT DIVIDE OK'
* 1E ALR
L R0,=F'3'
L R2,=F'2'
ALR R0,R2
RT1 CC1 NZ,NC
CL R0,=F'5'
RT1 CCE
L R0,=X'80000000'
L R2,=X'00000001'
ALR R0,R2
RT1 CC1 NZ,NC
L R0,=X'40000000'
L R2,=X'40000001'
ALR R0,R2
RT1 CC1 NZ,NC RPI 376
CL R0,=X'80000001'
RT1 CCE
L R0,=X'FFFFFFFF'
L R2,=X'00000001'
ALR R0,R2
RT1 CC2 Z,C
CL R0,=X'00000000'
RT1 CCE
L R0,=X'FFFFFFFF'
L R2,=X'00000002'
ALR R0,R2
RT1 CC3 NZ,C
CL R0,=X'00000001'
RT1 CCE
L R0,=X'00000000'
L R2,=X'00000000'
ALR R0,R2
RT1 CC0 Z,NC
CL R0,=X'00000000'
RT1 CCE
* 1F SLR
L R0,=X'FFFFFFFF' RPI 879
L R2,=X'80000000' RPI 879
SLR R0,R2 RPI 879
RT1 CC3 NZ,NB RPI 879
CL R0,=X'7FFFFFFF' RPI 879
RT1 CCE RPI 879
L R0,=X'80000000' RPI 831
L R2,=X'A0000000'
SLR R0,R2
RT1 CC1 NZ,B
CL R0,=X'E0000000'
RT1 CCE
L R0,=F'3'
L R2,=F'2'
SLR R0,R2
RT1 CC3 NZ,NB
CL R0,=F'1'
RT1 CCE
L R0,=X'80000000'
L R2,=X'00000001'
SLR R0,R2
RT1 CC3 NZ,NB
CL R0,=X'7FFFFFFF'
RT1 CCE
L R0,=X'00000000'
L R2,=X'00000001'
SLR R0,R2
RT1 CC1 NZ,B
CL R0,=X'FFFFFFFF'
RT1 CCE
L R0,=X'00000001'
L R2,=X'00000001'
SLR R0,R2
RT1 CC2 Z,NB
CL R0,=X'00000000'
RT1 CCE
L R0,=X'00000000'
L R2,=X'00000002'
SLR R0,R2
RT1 CC1 NZ,B
CL R0,=X'FFFFFFFE'
RT1 CCE
* 40 STH
L R0,=F'1'
STH R0,WORD
CLC WORD(2),=H'1'
RT1 CCE
L R0,=F'-1'
STH R0,WORD
CLC WORD(2),=H'-1'
RT1 CCE
* 41 LA
LA R1,*+4
CL R1,=A(*)
RT1 CCE
* 42 STC
LA R0,X'FF'
STC R0,BYTE
CLI BYTE,X'FF'
RT1 CCE
* 43 IC
SR R0,R0
IC R0,=C'A'
CL R0,=A(C'A')
RT1 CCE
LA R1,=C'AB'
L R2,=F'-1'
IC R0,1(R1)
CLM R0,1,=C'B'
RT1 CCE
IC R0,1(R1,R2) RPI 815 INDEX BY -1
CLM R0,1,=C'A'
RT1 CCE
* 44 EX
MVI BYTE,C'A'
EX 0,EX1
B EX2
EX1 MVI BYTE,C'B'
EX2 CLI BYTE,C'B'
RT1 CCE
MVI BYTE,C'A'
LA 1,C'B'
EX 1,EX3
B EX4
EX3 MVI BYTE,C'B'
EX4 CLI BYTE,C'B'
RT1 CCE
EX 0,EX5
RT1 ABORT
EX5 B EX6
EX6 EQU *
LA 2,EX8
EX 0,EX9
B EX10
EX7 WTO 'EX BAL RTN ENTERED'
BR 2
EX8 RT1 ABORT
EX9 BAL 2,EX7
RT1 ABORT
EX10 EQU *
RT1 OK
* 45 BAL
BAL1 BAL R1,BAL2
RT1 ABORT
BAL2 EQU *
RT1 OK
NILH R1,X'7FFF'
CL R1,=A(BAL1+4)
RT1 CCE
* 46 BCT
LA R1,10
SR R2,R2
BCT1 LA R2,1(R2)
BCT R1,BCT1
CL R1,=F'0'
RT1 CCE
CL R2,=F'10'
RT1 CCE
* 47 BC
NOP BCERR
CLI =X'1',1
BNE BCERR
RT1 CCE
CLI =X'1',2
BNL BCERR
BE BCERR
RT1 CCL
CLI =X'2',1
BNH BCERR
BE BCERR
RT1 CCH
B BCOK
BCERR RT1 ABORT
BCOK EQU *
RT1 OK
* 48 LH
LH R0,=H'-2'
CL R0,=F'-2'
RT1 CCE
* 49 CH
LH R0,=H'1'
CH R0,=H'1'
RT1 CCE
LH R0,=H'-1'
CH R0,=H'1'
RT1 CCL
LH R0,=H'1'
CH R0,=H'-1'
RT1 CCH
* 4A AH
LH R0,=H'1'
AH R0,=H'3'
RT1 CCH
CH R0,=H'4'
RT1 CCE
* 4B SH
LH R0,=H'1'
SH R0,=H'3'
RT1 CCL
CH R0,=H'-2'
RT1 CCE
* 4C MH
LH R0,=H'2'
MH R0,=H'3'
CH R0,=H'6'
RT1 CCE
* 4D BAS
BAS1 BAS R1,BAS2
RT1 ABORT
BAS2 EQU *
RT1 OK
NILH R1,X'7FFF'
CL R1,=A(BAS1+4)
RT1 CCE
* 4E CVD
LA R1,123
CVD R1,PWORK
RT1 CCE,PWORK,=PL8'123'
* 4F CVB
CVB R0,=PL8'2147483647'
CVD R0,PWORK
CP PWORK,=P'2147483647'
RT1 CCE
* 50 ST
LA R1,1234
ST R1,WORD
RT1 CCE,WORD,=F'1234'
* 54 N
L R0,=X'12345678'
N R0,=X'1335577F'
RT1 CCL
CL R0,=X'12345678'
RT1 CCE
* 55 CL
LA R1,1
CL R1,=F'1'
RT1 CCE
LA R1,0
CL R1,=F'1'
RT1 CCL
LA R1,2
CL R1,=F'1'
RT1 CCH
L R1,=F'-1'
CL R1,=F'1'
RT1 CCH
L R1,=F'1'
CL R1,=F'-1'
RT1 CCL
* 56 O
L R0,=X'12345678'
O R0,=X'11315177'
RT1 CCL
CL R0,=X'1335577F'
RT1 CCE
* 57 X
L R0,=X'12345678'
X R0,=X'11315177'
RT1 CCL
CL R0,=X'0305070F'
RT1 CCE
* 58 L
L R1,=F'12345'
CL R1,=A(12345)
RT1 CCE
* 59 C
LA R1,1
C R1,=F'1'
RT1 CCE
LA R1,0