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In the spec, iohpmctr is a counter, which seems to be 32-64 bit adjustable by hardware, but if it's 64 bit width for iohpmctr, the C model is out of this range and doesn't seem to report overflow. Is a bug or correct behavior ?
if g_reg_file.iohpmctr[i].counter is 0xFFFFFFFFFF,and its width is 40, then a interrupt might be report.
if g_reg_file.iohpmctr[i].counter is 0xFFFFFFFFFFFFFFFF,and its width is 64, then count will be zero, a interrupt can not be report. because of the value width is 64.
In the spec, iohpmctr is a counter, which seems to be 32-64 bit adjustable by hardware, but if it's 64 bit width for iohpmctr, the C model is out of this range and doesn't seem to report overflow. Is a bug or correct behavior ?
https://github.com/riscv-non-isa/riscv-iommu/blob/main/iommu_ref_model/libiommu/src/iommu_hpm.c#L84
if g_reg_file.iohpmctr[i].counter is 0xFFFFFFFFFF,and its width is 40, then a interrupt might be report.
if g_reg_file.iohpmctr[i].counter is 0xFFFFFFFFFFFFFFFF,and its width is 64, then
count
will be zero, a interrupt can not be report. because of the value width is 64.https://github.com/riscv-non-isa/riscv-iommu/blob/main/iommu_ref_model/libiommu/src/iommu_hpm.c#L86C14-L86C20
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