This service group defines the services to control application processor performance by managing a set of registers per application processor that are used for performance management and control. The ACPI CPPC (Collaborative Processor Performance Control) is an abstract and flexible mechanism that allows application processor to collaborate with the platform microcontroller to control the performance.
The CPPC extension defined in the RISC-V SBI specification cite:[SBI] defines the register IDs for the standard CPPC registers, along with additional registers also required by the application processor.
The ACPI CPPC specification cite:[ACPI] provides the details of the CPPC registers and also provides details on the performance control mechanism through CPPC.
This service group works with the abstract performance scale defined by the ACPI CPPC and is managed by the platform which is responsible for the conversion between the abstract performance level and the internal performance operating point.
The platform may have multiple application processors that share the actual performance controls like clock, voltage regulator and others depending on the platform. In such cases a performance level change for one application processor will affect the entire the group sharing the controls. Its the responsibility of the power and performance management software running on the application processor and the platform to coordinate and manage the group level performance changes.
The following table lists the services in the CPPC service group:
| Service ID | Service Name | Request Type |
|---|---|---|
0x01 |
CPPC_ENABLE_NOTIFICATION |
NORMAL_REQUEST |
0x02 |
CPPC_PROBE_REG |
NORMAL_REQUEST |
0x03 |
CPPC_READ_REG |
NORMAL_REQUEST |
0x04 |
CPPC_WRITE_REG |
NORMAL_REQUEST |
0x05 |
CPPC_GET_FAST_CHANNEL_REGION |
NORMAL_REQUEST |
0x06 |
CPPC_GET_FAST_CHANNEL_OFFSET |
NORMAL_REQUEST |
0x07 |
CPPC_GET_HART_LIST |
NORMAL_REQUEST |
The CPPC service group defines the fast-channels to be used by the application processor to request performance changes and to obtain performance change feedback for an application processor from the platform microcontroller.
A fast-channel shared memory layout is specific to the CPPC service group. The data written in a fast-channel do not follow the conventional RPMI message format. The simple data format supported by the fast-channel allows faster processing of the performance change requests made through a fast-channel and faster read of the performance feedback values supported over the fast-channel.
The CPPC service group defines two types of fast-channel for each application processor. If fast-channels are supported then each application processor must be assigned both types fast-channel.
In this fast-channel the application processor will either write
the desired performance level in case of normal mode or the minimum
and maximum performance level in case of Autonomous (CPPC2) mode in the
fast-channel. Otherwise the application processor can call the service
CPPC_WRITE_REG for the DesiredPerformanceRegister or
MinimumPerformanceRegister and MaximumPerformanceRegister.
The supported values in this fast-channel which depends on the CPPC mode, either
normal or autonomous mode is discoverable through CPPC_GET_FAST_CHANNEL_REGION
service.
The size of this fast-channel type is 8 bytes.
| CPPC Mode | Layout | ||||||
|---|---|---|---|---|---|---|---|
Normal Mode |
|
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Autonomous (CPPC2) mode |
|
In this fast-channel the application processor will read the supported value for estimating the delivered performance as performance feedback for an application processor. The application processor current frequency (Hz) is used for performance feedback in this fast-channel. The platform microcontroller must write the frequency of an application processor in the fast-channel whenever it changes.
The size of this fast-channel type is 8 bytes.
| Offset | Value (32-bit) |
|---|---|
0x0 |
Current frequency low 32-bit (Hz) |
0x4 |
Current frequency high 32-bit (Hz) |
In the shared memory region allocated by the platform for fast-channels, the Performance Request fast-channels must be grouped together for all the application processors. Similarly, the Performance Feedback fast-channels must be grouped together.
The size of the shared memory region for fast-channels for all the managed
application processors must be a power-of-2. The base-address and size
(bytes) of the fast-channels shared memory region can be discovered using the
service CPPC_GET_FAST_CHANNEL_REGION. The base-address of the shared memory
region must be aligned to 8 bytes which is maximum size of a fast-channel in
both the types.
The offsets of fast-channel of both types for an application processor are
aligned to 8 bytes. The offset of both fast-channel types in the shared memory
region can be discovered through service CPPC_GET_FAST_CHANNEL_OFFSET. The
offsets discovered can be added into the base-address of the shared memory
region to form the address of Performance Request fast-channel and Performance
Feedback fast-channel for an application processor.
A doorbell can also be supported for this fast-channel type which is shared
between all the application processors. If a doorbell is available then it must
be supported through a read-modify-write sequence to a memory-mapped register.
The doorbell details and attributes can be discovered by the application
processor through the CPPC_GET_FAST_CHANNEL_REGION service.
This service allows the application processor to subscribe to CPPC
service group notifications. The platform may optionally support notifications
for events that may occur. The platform microcontroller can send these
notification messages to the application processor if they are implemented and
the application processor has subscribed to them. The supported events are
described in Notifications.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
EVENT_ID |
uint32 |
The event to be subscribed for notification. |
1 |
REQ_STATE |
uint32 |
Requested event notification state 0: Disable 1: Enable 2: Return current state. Any other values of |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
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1 |
CURRENT_STATE |
uint32 |
Current 0: Notification is disabled 1: Notification is enabled. In case of |
This service is used to probe a CPPC register implementation status for a
application processor. If the CPPC register reg_id is implemented then
the length in bits is returned in REG_LENGTH field. If the register is not
supported or invalid then the REG_LENGTH will be 0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID |
1 |
HART_ID |
uint32 |
Hart ID |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||||
1 |
REG_LENGTH |
uint32 |
Register length (bits) |
This service is used to read a CPPC register. If the fast-channels are
supported, a read of the DesiredPerformanceRegister or
MinimumPerformanceRegister and MaximumPerformanceRegister through this
service will return the current desired performance level or
minimum and maximum performance level limit depending on the CPPC mode from the
fast-channel of a application processor.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID |
1 |
HART_ID |
uint32 |
Hart ID |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||||
1 |
DATA_LOW |
uint32 |
Lower 32-bit of the data. |
||||||||
2 |
DATA_HIGH |
uint32 |
Upper 32-bit of data. This will be |
This service is used to write a CPPC register.
If the fast-channels are supported the application processor must only write
desired performance level in the fast-channel instead of writing into the
DesiredPerformanceRegister through this service. Similarly, in case of the
autonomous mode the application processor must write minimum and maximum limit
levels into the fast-channel instead of calling this service for
MinimumPerformanceRegister and MaximumPerformanceRegister. Otherwise the
writes to these registers may be ignored.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
REG_ID |
uint32 |
CPPC register ID |
1 |
HART_ID |
uint32 |
Hart ID |
2 |
DATA_LOW |
uint32 |
Lower 32-bit of data. |
3 |
DATA_HIGH |
uint32 |
Upper 32-bit of data. This is ignored if the register is of 32-bit length. |
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
This service is used to get the details of the shared memory region containing all the fast-channels, attributes of the fast-channel and the details of the doorbell.
| NA |
|---|
| Word | Name | Type | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||||||
1 |
FLAGS |
uint32 |
|
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2 |
REGION_ADDR_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region physical address. |
||||||||||
3 |
REGION_ADDR_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region physical address. |
||||||||||
4 |
REGION_SIZE_LOW |
uint32 |
Lower 32-bit of the fast-channels shared memory region size. |
||||||||||
5 |
REGION_SIZE_HIGH |
uint32 |
Upper 32-bit of the fast-channels shared memory region size. |
||||||||||
6 |
DB_ADDR_LOW |
uint32 |
Lower 32-bit of doorbell address. |
||||||||||
7 |
DB_ADDR_HIGH |
uint32 |
Upper 32-bit of doorbell address. |
||||||||||
8 |
DB_SETMASK_LOW |
uint32 |
Lower 32-bit of doorbell set mask. |
||||||||||
9 |
DB_SETMASK_HIGH |
uint32 |
Upper 32-bit of doorbell set mask. |
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10 |
DB_PRESERVEMASK_LOW |
uint32 |
Lower 32-bit doorbell preserve mask. |
||||||||||
11 |
DB_PRESERVEMASK_HIGH |
uint32 |
Upper 32-bit doorbell preserve mask. |
This service is used to get the offsets of Performance Request fast-channel and Performance Feedback fast-channel for an application processor in the shared memory region containing all the fast-channels.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
HART_ID |
uint32 |
Hart ID |
| Word | Name | Type | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||||
1 |
PERF_REQUEST_OFFSET_LOW |
uint32 |
Lower 32-bit of a Performance Request fast-channel offset. |
||||||||
2 |
PERF_REQUEST_OFFSET_HIGH |
uint32 |
Upper 32-bit of a Performance Request fast-channel offset. |
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3 |
PERF_FEEDBACK_OFFSET_LOW |
uint32 |
Lower 32-bit of a Performance Feedback fast-channel offset. |
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4 |
PERF_FEEDBACK_OFFSET_HIGH |
uint32 |
Upper 32-bit of a Performance Feedback fast-channel offset. |
This service retrieves the list of Hart IDs managed by this service group for performance control.
If the number of words required for all available Hart IDs exceeds the number of
words that can be returned in one acknowledgement message then the platform
microcontroller will set the REMAINING and RETURNED fields accordingly and
only return the Hart IDs which can be accommodated. The application processor
may need to call this service again with the appropriate START_INDEX until the
REMAINING field returns 0.
| Word | Name | Type | Description |
|---|---|---|---|
0 |
START_INDEX |
uint32 |
Starting index of Hart ID. |
| Word | Name | Type | Description | ||||||
|---|---|---|---|---|---|---|---|---|---|
0 |
STATUS |
int32 |
Return error code
|
||||||
1 |
REMAINING |
uint32 |
Remaining number of Hart IDs to be returned. |
||||||
2 |
RETURNED |
uint32 |
Number of Hart IDs returned in this request. |
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3 |
HART_ID[N] |
uint32 |
Hart IDs |