diff --git a/rust-version b/rust-version index 75124dc8ff..bfce11a730 100644 --- a/rust-version +++ b/rust-version @@ -1 +1 @@ -1a1876c9790f168fb51afa335a7ba3e6fc267d75 +bfe762e0ed2e95041cc12c02c5565c4368f2cc9f diff --git a/src/diagnostics.rs b/src/diagnostics.rs index de0ed879b3..4683965159 100644 --- a/src/diagnostics.rs +++ b/src/diagnostics.rs @@ -1,7 +1,7 @@ use std::fmt::{self, Write}; use std::num::NonZero; -use rustc_errors::{Diag, DiagnosticMessage, Level}; +use rustc_errors::{Diag, DiagMessage, Level}; use rustc_span::{SpanData, Symbol, DUMMY_SP}; use rustc_target::abi::{Align, Size}; @@ -95,7 +95,7 @@ impl fmt::Debug for TerminationInfo { } impl MachineStopType for TerminationInfo { - fn diagnostic_message(&self) -> DiagnosticMessage { + fn diagnostic_message(&self) -> DiagMessage { self.to_string().into() } fn add_args( diff --git a/src/helpers.rs b/src/helpers.rs index d69c6fe901..ddefecca59 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -1102,20 +1102,17 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { } } - let (val, status) = match src.layout.ty.kind() { - // f32 - ty::Float(FloatTy::F32) => + let ty::Float(fty) = src.layout.ty.kind() else { + bug!("float_to_int_checked: non-float input type {}", src.layout.ty) + }; + + let (val, status) = match fty { + FloatTy::F16 => unimplemented!("f16_f128"), + FloatTy::F32 => float_to_int_inner::(this, src.to_scalar().to_f32()?, cast_to, round), - // f64 - ty::Float(FloatTy::F64) => + FloatTy::F64 => float_to_int_inner::(this, src.to_scalar().to_f64()?, cast_to, round), - // Nothing else - _ => - span_bug!( - this.cur_span(), - "attempted float-to-int conversion with non-float input type {}", - src.layout.ty, - ), + FloatTy::F128 => unimplemented!("f16_f128"), }; if status.intersects( diff --git a/src/shims/intrinsics/mod.rs b/src/shims/intrinsics/mod.rs index b67d588dbc..d4905c22a6 100644 --- a/src/shims/intrinsics/mod.rs +++ b/src/shims/intrinsics/mod.rs @@ -274,13 +274,14 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { _ => bug!(), }; let float_finite = |x: &ImmTy<'tcx, _>| -> InterpResult<'tcx, bool> { - Ok(match x.layout.ty.kind() { - ty::Float(FloatTy::F32) => x.to_scalar().to_f32()?.is_finite(), - ty::Float(FloatTy::F64) => x.to_scalar().to_f64()?.is_finite(), - _ => bug!( - "`{intrinsic_name}` called with non-float input type {ty:?}", - ty = x.layout.ty, - ), + let ty::Float(fty) = x.layout.ty.kind() else { + bug!("float_finite: non-float input type {}", x.layout.ty) + }; + Ok(match fty { + FloatTy::F16 => unimplemented!("f16_f128"), + FloatTy::F32 => x.to_scalar().to_f32()?.is_finite(), + FloatTy::F64 => x.to_scalar().to_f64()?.is_finite(), + FloatTy::F128 => unimplemented!("f16_f128"), }) }; match (float_finite(&a)?, float_finite(&b)?) { diff --git a/src/shims/intrinsics/simd.rs b/src/shims/intrinsics/simd.rs index ca8773cac1..bb18fba5c9 100644 --- a/src/shims/intrinsics/simd.rs +++ b/src/shims/intrinsics/simd.rs @@ -83,8 +83,10 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let op = op.to_scalar(); // "Bitwise" operation, no NaN adjustments match float_ty { + FloatTy::F16 => unimplemented!("f16_f128"), FloatTy::F32 => Scalar::from_f32(op.to_f32()?.abs()), FloatTy::F64 => Scalar::from_f64(op.to_f64()?.abs()), + FloatTy::F128 => unimplemented!("f16_f128"), } } Op::Sqrt => { @@ -93,6 +95,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { }; // FIXME using host floats match float_ty { + FloatTy::F16 => unimplemented!("f16_f128"), FloatTy::F32 => { let f = op.to_scalar().to_f32()?; let res = f.to_host().sqrt().to_soft(); @@ -105,6 +108,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let res = this.adjust_nan(res, &[f]); Scalar::from(res) } + FloatTy::F128 => unimplemented!("f16_f128"), } } Op::Round(rounding) => { @@ -112,6 +116,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { span_bug!(this.cur_span(), "{} operand is not a float", intrinsic_name) }; match float_ty { + FloatTy::F16 => unimplemented!("f16_f128"), FloatTy::F32 => { let f = op.to_scalar().to_f32()?; let res = f.round_to_integral(rounding).value; @@ -124,6 +129,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let res = this.adjust_nan(res, &[f]); Scalar::from_f64(res) } + FloatTy::F128 => unimplemented!("f16_f128"), } } Op::Numeric(name) => { @@ -267,6 +273,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { span_bug!(this.cur_span(), "{} operand is not a float", intrinsic_name) }; let val = match float_ty { + FloatTy::F16 => unimplemented!("f16_f128"), FloatTy::F32 => { let a = a.to_f32()?; let b = b.to_f32()?; @@ -283,6 +290,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let res = this.adjust_nan(res, &[a, b, c]); Scalar::from(res) } + FloatTy::F128 => unimplemented!("f16_f128"), }; this.write_scalar(val, &dest)?; } @@ -724,6 +732,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let left = left.to_scalar(); let right = right.to_scalar(); Ok(match float_ty { + FloatTy::F16 => unimplemented!("f16_f128"), FloatTy::F32 => { let left = left.to_f32()?; let right = right.to_f32()?; @@ -744,6 +753,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { let res = this.adjust_nan(res, &[left, right]); Scalar::from_f64(res) } + FloatTy::F128 => unimplemented!("f16_f128"), }) } } diff --git a/src/shims/windows/foreign_items.rs b/src/shims/windows/foreign_items.rs index 734737a86d..f56ea06dbe 100644 --- a/src/shims/windows/foreign_items.rs +++ b/src/shims/windows/foreign_items.rs @@ -366,6 +366,12 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { this.WakeByAddressSingle(ptr_op)?; } + "WakeByAddressAll" => { + let [ptr_op] = + this.check_shim(abi, Abi::System { unwind: false }, link_name, args)?; + + this.WakeByAddressAll(ptr_op)?; + } // Dynamic symbol loading "GetProcAddress" => { diff --git a/src/shims/windows/sync.rs b/src/shims/windows/sync.rs index 2b9801fea6..1ce385aaab 100644 --- a/src/shims/windows/sync.rs +++ b/src/shims/windows/sync.rs @@ -384,6 +384,21 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> { Ok(()) } + fn WakeByAddressAll(&mut self, ptr_op: &OpTy<'tcx, Provenance>) -> InterpResult<'tcx> { + let this = self.eval_context_mut(); + + let ptr = this.read_pointer(ptr_op)?; + + // See the Linux futex implementation for why this fence exists. + this.atomic_fence(AtomicFenceOrd::SeqCst)?; + + while let Some(thread) = this.futex_wake(ptr.addr().bytes(), u32::MAX) { + this.unblock_thread(thread); + this.unregister_timeout_callback_if_exists(thread); + } + + Ok(()) + } fn SleepConditionVariableSRW( &mut self,