4.12.0

Description

• bug fix in latest $::env(BUILD_STRING) to trim quotes off at the end
• adding download_github_asset.py script
• #314

Full Changelog: 4.11.0...4.12.0

Minor Release 4.11.0

Pull Requests Since 4.10.2

Pull Request Details

Patch Release 4.10.2

Description

• Delete obsolete system_mps430.mk
• adding pdi target option for Versal builds

Full Changelog: 4.10.1...4.10.2

Patch Release 4.10.1

Description

• Update LICENSE.txt
• whitespace removal

Full Changelog: 4.10.0...4.10.1

Legacy Tag release: v3.2.0

Description

• adding vivado/hls IP .zip export support for ruckus v3

Full Changelog: v3.1.2...v3.2.0

Minor Release 4.10.0

Pull Requests Since v4.9.0

Unlabeled

1. #306 - Vivado: adding ability to bypass bit and/or xsa copy
2. #307 - Prevent XSIM from attempting to block on non-existent run

Pull Request Details

Vivado: adding ability to bypass bit and/or xsa copy

Author:	Larry Ruckman [email protected]
Date:	Mon Dec 11 10:43:20 2023 -0800
Pull:	#306 (79 additions, 33 deletions, 3 files changed)
Branch:	slaclab/ESCORE-851
Jira:	https://jira.slac.stanford.edu/issues/ESCORE-851

Notes:

Description

• Feature request from @bengineerd to reduce number of files in target dir that will never be used

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Prevent XSIM from attempting to block on non-existent run

Author:	Larry Ruckman [email protected]
Date:	Wed Nov 15 09:09:09 2023 -0800
Pull:	#307 (0 additions, 4 deletions, 1 files changed)
Branch:	calebfletcher/xsim-run-wait-fix

Notes:

The XSIM integration currently uses wait_on_run on a design run called sim_1. Since Vivado treats XSIM simulation runs as entirely separate to the design runs, sim_1 isn't considered a run that you can call wait_on_run on (confirmed through get_runs returning only synth_1 and impl_1 despite being able to run a simulation run, and the create_run command only having options for synthesis and implementation flows).

The run command executed just prior to this line is already a blocking call, so the wait_on_run isn't necessary and this PR removes it.

I'm not sure if this has changed at some point in Vivado's history, but I have confirmed that at least in 2023.2 there is no design run called sim_1. I had a look at the recent release notes and didn't see anything relevant, but happy to put in a version condition if you're aware of if it worked in a previous version of Vivado.

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Minor Release v4.9.0

Pull Requests Since v4.8.5

Unlabeled

1. #304 - changing 'IP_FLOW: Failed to register IP shared directory path' from warning to error

Pull Request Details

changing 'IP_FLOW: Failed to register IP shared directory path' from warning to error

Author:	Larry Ruckman [email protected]
Date:	Mon Oct 30 15:58:28 2023 -0700
Pull:	#304 (3 additions, 2 deletions, 2 files changed)
Branch:	slaclab/loadIpCore-json

Notes:

Description

• This will help us catch .XCI that get broken after doing a XML-to-JSON upgrade

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Patch Release v4.8.5

Pull Requests Since v4.8.4

Unlabeled

1. #301 - vivado/vcs.tcl Update
2. #302 - Added variables for VCS script generation

Pull Request Details

vivado/vcs.tcl Update

Author:	Larry Ruckman [email protected]
Date:	Mon Jul 10 14:23:44 2023 -0700
Pull:	#301 (39 additions, 33 deletions, 3 files changed)
Branch:	slaclab/vcs-vivado-2023-dev

Notes:

Description

• Fixed the issue with Vivado 2023.1 changing sim_vcs_mx.sh format
• Cleaned up the sim_vcs_mx.sh.tcl parsing in vcs.tcl as well
• Tested on both Vivado 2022.2 and Vivado 2023.1

---

Added variables for VCS script generation

Author:	Larry Ruckman [email protected]
Date:	Mon Aug 7 11:11:15 2023 -0700
Pull:	#302 (16 additions, 3 deletions, 3 files changed)
Branch:	FilMarini/vcs_fix

Notes:

List of changes:

vivado/vcs.tcl

• If VCS_LIB_PATH variable exists, then that is PATH where the vivado compiled libraries for VCS are, otherwise use default PATH ${VIVADO_INSTALL}/vcs-${VersionNumber}
• if VIVADO_PROJECT_SIM exists, then set that as simulation name, otherwise set as [get_property top [get_filesets sim_1]]
  (NB the variable VIVADO_PROJECT_SIM is used also in vivado/xsim.tcl and vivado/msim.tcl scrips)

vivado/sources.tcl

• if VIVADO_PROJECT_SIM is set, then set it as simulation top level (otherwise you would have conflict if you run directly make vcs after a make clean. This might make the change in vivado/vcs.tcl concerning the use of VIVADO_PROJECT_SIM variable useless, but since that is what is done in both xsim.tcl and msim.tcl, I would leave it as double confirmation, in case you want to modify the simulation top level after having done make sources.

system_vivado.mk

• Just a small beautify, fix of a previous PR i made

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Patch Release v4.8.4

Description

• changing GZIP_BUILD_IMAGE default (if not defined) to 0
• chaning BuildIpCores() to use PARALLEL_SYNTH instead of all CPUs
• allow simulation source code in GHDL source list

Full Changelog: v4.8.3...v4.8.4

Patch Release v4.8.3

Description

• Adding .jou* to .gitignore
• Update .gitattributes
• updating supported Vivado release msg

Full Changelog: v4.8.2...v4.8.3