From 54c6a4c09ce9ea19a109d7b5390627928616ca2a Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 11 May 2023 11:22:41 +0200 Subject: [PATCH 1/5] boards: nucleo_wba52cg: Enable flash and debug using OpenOCD OpenOCD can now be used to flash and debug nucleo_wba52cg. However it required use of STMicroelectronics OpenOCD fork. Add instructions on how to use it. Signed-off-by: Erwan Gouriou --- boards/arm/nucleo_wba52cg/board.cmake | 4 ++++ boards/arm/nucleo_wba52cg/support/openocd.cfg | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/boards/arm/nucleo_wba52cg/board.cmake b/boards/arm/nucleo_wba52cg/board.cmake index 50f543d4e6ab2f..27c19f19b00d19 100644 --- a/boards/arm/nucleo_wba52cg/board.cmake +++ b/boards/arm/nucleo_wba52cg/board.cmake @@ -1,3 +1,7 @@ board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +set(OPENOCD "/local/mcu/tools/openocd/src/openocd" CACHE FILEPATH "" FORCE) +set(OPENOCD_DEFAULT_PATH /local/mcu/tools/openocd/tcl) + include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/nucleo_wba52cg/support/openocd.cfg b/boards/arm/nucleo_wba52cg/support/openocd.cfg index 10647e20ad8cb3..7c785bec412853 100644 --- a/boards/arm/nucleo_wba52cg/support/openocd.cfg +++ b/boards/arm/nucleo_wba52cg/support/openocd.cfg @@ -22,5 +22,3 @@ set CLOCK_FREQ 8000 reset_config srst_only srst_nogate source [find target/stm32wbax.cfg] - -gdb_memory_map disable From afbfb2921a21bc5dc2893968e671e81a29df4246 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Fri, 6 Oct 2023 14:22:09 +0200 Subject: [PATCH 2/5] west.yml: hal_stm32: Use SW/JTAG signals description SW/JTAG signals description are useful when we don't need them. Signed-off-by: Erwan Gouriou --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index afd89e8f802f4e..2b34743d593e4f 100644 --- a/west.yml +++ b/west.yml @@ -229,7 +229,7 @@ manifest: groups: - hal - name: hal_stm32 - revision: 22925907a6faeb601fc9a0d8cbb65c4b26d38043 + revision: 60c9634f61c697e1c310ec648d33529712806069 path: modules/hal/stm32 groups: - hal From 31a8dbffcc7233fed549f4ca997f1ee9fd793d85 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Wed, 27 Sep 2023 17:58:43 +0200 Subject: [PATCH 3/5] soc: stm32: PM: Disable jtag port pins if no debug At chip startup, jtag pins are configured by default to enable debug. This configuration adds consumption and when using PM profile, we can save ~40uA by resetting this configuration and setting pins to analog mode. Signed-off-by: Erwan Gouriou --- dts/bindings/gpio/swj-connector.yaml | 5 ++++ soc/arm/st_stm32/common/CMakeLists.txt | 4 +++ soc/arm/st_stm32/common/Kconfig.soc | 8 ++++++ soc/arm/st_stm32/common/pm_debug_swj.c | 40 ++++++++++++++++++++++++++ 4 files changed, 57 insertions(+) create mode 100644 dts/bindings/gpio/swj-connector.yaml create mode 100644 soc/arm/st_stm32/common/pm_debug_swj.c diff --git a/dts/bindings/gpio/swj-connector.yaml b/dts/bindings/gpio/swj-connector.yaml new file mode 100644 index 00000000000000..1ced649632bebb --- /dev/null +++ b/dts/bindings/gpio/swj-connector.yaml @@ -0,0 +1,5 @@ +description: Serial Wire - JTAG Connector + +compatible: "swj-connector" + +include: pinctrl-device.yaml diff --git a/soc/arm/st_stm32/common/CMakeLists.txt b/soc/arm/st_stm32/common/CMakeLists.txt index 70dd8c865c9789..af898951cc5f37 100644 --- a/soc/arm/st_stm32/common/CMakeLists.txt +++ b/soc/arm/st_stm32/common/CMakeLists.txt @@ -8,3 +8,7 @@ zephyr_sources_ifdef(CONFIG_STM32_BACKUP_SRAM stm32_backup_sram.c) zephyr_linker_sources_ifdef(CONFIG_STM32_BACKUP_SRAM SECTIONS stm32_backup_sram.ld) zephyr_sources(soc_config.c) + +if (NOT CONFIG_DEBUG AND CONFIG_PM) + zephyr_sources_ifdef(CONFIG_DT_HAS_SWJ_CONNECTOR_ENABLED pm_debug_swj.c) +endif() diff --git a/soc/arm/st_stm32/common/Kconfig.soc b/soc/arm/st_stm32/common/Kconfig.soc index 8e98514a79eb4e..2fd9084cc55ab7 100644 --- a/soc/arm/st_stm32/common/Kconfig.soc +++ b/soc/arm/st_stm32/common/Kconfig.soc @@ -21,6 +21,14 @@ config USE_STM32_ASSERT help Enable asserts in STM32Cube HAL and LL drivers. +config SWJ_ANALOG_PRIORITY + int "SWJ DP port to analog routine initialization priority" + default 49 + help + Initialization priority of the routine within the PRE_KERNEL1 level. + This priority must be greater than GPIO_INIT_PRIORITY and lower than + UART_INIT_PRIORITY. + choice POWER_SUPPLY_CHOICE prompt "STM32 power supply configuration" default POWER_SUPPLY_LDO diff --git a/soc/arm/st_stm32/common/pm_debug_swj.c b/soc/arm/st_stm32/common/pm_debug_swj.c new file mode 100644 index 00000000000000..5897670e5f6ec4 --- /dev/null +++ b/soc/arm/st_stm32/common/pm_debug_swj.c @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2023 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#define SWJ_NODE DT_NODELABEL(swj_port) + +PINCTRL_DT_DEFINE(SWJ_NODE); + +const struct pinctrl_dev_config *swj_pcfg = PINCTRL_DT_DEV_CONFIG_GET(SWJ_NODE); + +/* + * Serial Wire / JTAG port pins are enabled as part of SoC default configuration. + * When debug access is not needed and in case power consumption performance is + * expected, configure matching pins to analog in order to save power. + */ + +static int swj_to_analog(void) +{ + int err; + + /* Set Serial Wire / JTAG port pins to analog mode */ + err = pinctrl_apply_state(swj_pcfg, PINCTRL_STATE_SLEEP); + if (err < 0) { + __ASSERT(0, "SWJ pinctrl setup failed"); + return err; + } + + return 0; +} + +/* Run this routine as the earliest pin configuration in the target, + * to avoid potential conflicts with devices accessing SWJ-DG pins for + * their own needs. + */ +SYS_INIT(swj_to_analog, PRE_KERNEL_1, CONFIG_SWJ_ANALOG_PRIORITY); From 432ed2847cdbe3b3baca367102fb122d2a6f294e Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Wed, 4 Oct 2023 09:27:47 +0200 Subject: [PATCH 4/5] dts: stm32u5: Add SW/JTAG debug port node Provide jtag port pins description, so they can be used to be set in analog mode when not required to save power (around 40uA saved in total). Signed-off-by: Erwan Gouriou --- dts/arm/st/u5/stm32u5.dtsi | 11 +++++++++++ dts/arm/st/wba/stm32wba.dtsi | 10 ++++++++++ 2 files changed, 21 insertions(+) diff --git a/dts/arm/st/u5/stm32u5.dtsi b/dts/arm/st/u5/stm32u5.dtsi index f721617ef5bba8..43f4830bf729bd 100644 --- a/dts/arm/st/u5/stm32u5.dtsi +++ b/dts/arm/st/u5/stm32u5.dtsi @@ -840,6 +840,17 @@ status = "disabled"; }; }; + + }; + + swj_port: swj_port { + compatible = "swj-connector"; + pinctrl-0 = <&debug_jtms_swdio_pa13 &debug_jtck_swclk_pa14 + &debug_jtdi_pa15 &debug_jtdo_swo_pb3 + &debug_jtrst_pb4>; + pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15 + &analog_pb3 &analog_pb4>; + pinctrl-names = "default", "sleep"; }; die_temp: dietemp { diff --git a/dts/arm/st/wba/stm32wba.dtsi b/dts/arm/st/wba/stm32wba.dtsi index 6946f23f64e58f..2d00be8ef53b2b 100644 --- a/dts/arm/st/wba/stm32wba.dtsi +++ b/dts/arm/st/wba/stm32wba.dtsi @@ -462,6 +462,16 @@ }; }; + swj_port: swj_port { + compatible = "swj-connector"; + pinctrl-0 = <&debug_jtms_swdio_pa13 &debug_jtck_swclk_pa14 + &debug_jtdi_pa15 &debug_jtdo_swo_pb3 + &debug_jtrst_pb4>; + pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15 + &analog_pb3 &analog_pb4>; + pinctrl-names = "default", "sleep"; + }; + smbus1: smbus1 { compatible = "st,stm32-smbus"; #address-cells = <1>; From 8fbf9bd29eda2ca3d50a20a4189e836c278bd90e Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 19 Oct 2023 09:36:27 +0200 Subject: [PATCH 5/5] include: pinctrl.h: Make PINCTRL_SKIP_SLEEP available with CONFIG_PM In some cases, PINCTRL_STATE_SLEEP may be required even when CONFIG_PM_DEVICE is not defined. One example is the possibility/need to put JTAG pins to analog when CONIG_PM=y and CONFIG_DEBUG=n. Signed-off-by: Erwan Gouriou --- doc/hardware/pinctrl/index.rst | 11 ++++++----- include/zephyr/drivers/pinctrl.h | 4 ++-- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/doc/hardware/pinctrl/index.rst b/doc/hardware/pinctrl/index.rst index c67f46a0cb1a1b..98edfeacf58614 100644 --- a/doc/hardware/pinctrl/index.rst +++ b/doc/hardware/pinctrl/index.rst @@ -145,9 +145,10 @@ In most situations, the states defined in Devicetree will be the ones used in the compiled firmware. However, there are some cases where certain states will be conditionally used depending on a compilation flag. A typical case is the ``sleep`` state. This state is only used in practice if -:kconfig:option:`CONFIG_PM_DEVICE` is enabled. If a firmware variant without device -power management is needed, one should in theory remove the ``sleep`` state from -Devicetree to not waste ROM space storing such unused state. +:kconfig:option:`CONFIG_PM` or :kconfig:option:`CONFIG_PM_DEVICE` is enabled. +If a firmware variant without these power management configurations is needed, +one should in theory remove the ``sleep`` state from Devicetree to not waste ROM +space storing such unused state. States can be skipped by the ``pinctrl`` Devicetree macros if a definition named ``PINCTRL_SKIP_{STATE_NAME}`` expanding to ``1`` is present when pin control @@ -157,8 +158,8 @@ management: .. code-block:: c - #ifndef CONFIG_PM_DEVICE - /** If device power management is not enabled, "sleep" state will be ignored. */ + #if !defined(CONFIG_PM) && !defined(CONFIG_PM_DEVICE) + /** Out of power management configurations, ignore "sleep" state. */ #define PINCTRL_SKIP_SLEEP 1 #endif diff --git a/include/zephyr/drivers/pinctrl.h b/include/zephyr/drivers/pinctrl.h index b0fd60e891b7e7..e03456c76c364f 100644 --- a/include/zephyr/drivers/pinctrl.h +++ b/include/zephyr/drivers/pinctrl.h @@ -76,8 +76,8 @@ struct pinctrl_dev_config { /** @cond INTERNAL_HIDDEN */ -#ifndef CONFIG_PM_DEVICE -/** If device power management is not enabled, "sleep" state will be ignored. */ +#if !defined(CONFIG_PM) && !defined(CONFIG_PM_DEVICE) +/** Out of power management configurations, ignore "sleep" state. */ #define PINCTRL_SKIP_SLEEP 1 #endif