feat(SPI): flash write/read working on AES-KU040

- update SPI submodule
- fix wrapper constraints to place SPI output register in IO
- fix wrapper top level with correct clock primitive for KU040 board
- initial working firmware example with SPI Flash write and read
  operations

hardware/fpga/vivado/AES-KU040-DB-G/iob_soc_opencryptolinux_fpga_wrapper.v

@@ -78,8 +78,9 @@ module iob_soc_opencryptolinux_fpga_wrapper (
    wire       ETH_Clk;
 
    //eth clock
-   IBUFG rxclk_buf (
+   BUFGCE_1 rxclk_buf (
       .I(ENET_RX_CLK),
+      .CE(1'b1),
       .O(ETH_Clk)
    );
    ODDRE1 ODDRE1_inst (

hardware/fpga/vivado/AES-KU040-DB-G/iob_soc_opencryptolinux_fpga_wrapper_dev.sdc

@@ -147,3 +147,10 @@ set_property IOSTANDARD LVCMOS18 [get_ports spi_WP_N_io]
 # DQ3
 set_property PACKAGE_PIN H12 [get_ports spi_HOLD_N_io]
 set_property IOSTANDARD LVCMOS18 [get_ports spi_HOLD_N_io]
+
+set_property IOB TRUE [get_ports spi_SS_o]
+set_property IOB TRUE [get_ports spi_SCLK_o]
+set_property IOB TRUE [get_cells iob_soc_opencryptolinux0/SPI0/fl_spi0/dq_out_r_reg[0]]
+set_property IOB TRUE [get_cells iob_soc_opencryptolinux0/SPI0/fl_spi0/dq_out_r_reg[1]]
+set_property IOB TRUE [get_cells iob_soc_opencryptolinux0/SPI0/fl_spi0/dq_out_r_reg[2]]
+set_property IOB TRUE [get_cells iob_soc_opencryptolinux0/SPI0/fl_spi0/dq_out_r_reg[3]]

software/src/iob_soc_opencryptolinux_firmware.c

@@ -25,7 +25,7 @@
 
 #define MTIMER_SECONDS_TO_CLOCKS(SEC) ((uint64_t)(((SEC) * (FREQ))))
 
-#define NSAMPLES 16
+#define NSAMPLES 256
 
 // Machine mode interrupt service routine
 static void irq_entry(void) __attribute__((interrupt("machine")));
@@ -197,22 +197,45 @@ int main() {
   char prog_data[NSAMPLES] = {0};
   char *char_data = NULL;
   unsigned int read_data[NSAMPLES] = {0};
+  unsigned int flash_addr = 0;
   int sample = 0;
   // int test_result = 0;
   for (sample = 0; sample < NSAMPLES; sample++) {
-    prog_data[sample] = 0xFF;
+    prog_data[sample] = sample;
     // prog_data[sample] = sample;
   }
 
   spi_read_all_regs();
 
-  spiflash_memProgram(prog_data, NSAMPLES, 0x0);
+  printf("\nBefore erase\n");
+  for (sample = 0; sample < NSAMPLES; sample = sample + 4) {
+    read_data[sample >> 2] = spiflash_readmem(flash_addr + sample);
+  }
+  // check prog vs read data
+  char_data = (char *)read_data;
+  for (sample = 0; sample < NSAMPLES; sample++) {
+    printf("\tread_data[%x] = %02x\n", sample, char_data[sample]);
+  }
+
+  spiflash_erase_address_range(flash_addr, NSAMPLES);
+
+  printf("\nAfter erase\n");
+  for (sample = 0; sample < NSAMPLES; sample = sample + 4) {
+    read_data[sample >> 2] = spiflash_readmem(flash_addr + sample);
+  }
+  // check prog vs read data
+  char_data = (char *)read_data;
+  for (sample = 0; sample < NSAMPLES; sample++) {
+    printf("\tread_data[%x] = %02x\n", sample, char_data[sample]);
+  }
+
+  spiflash_memProgram(prog_data, NSAMPLES, flash_addr);
   printf("\nAfter program\n");
 
   spi_read_all_regs();
 
   for (sample = 0; sample < NSAMPLES; sample = sample + 4) {
-    read_data[sample >> 2] = spiflash_readmem(0x0 + sample);
+    read_data[sample >> 2] = spiflash_readmem(flash_addr + sample);
   }
   // check prog vs read data
   char_data = (char *)read_data;
@@ -221,6 +244,9 @@ int main() {
       printf("Error: data[%x] = %02x != read_data[%x] = %02x\n", sample,
              prog_data[sample], sample, char_data[sample]);
       test_result = 1;
+    } else {
+      printf("Valid: data[%x] = %02x == read_data[%x] = %02x\n", sample,
+             prog_data[sample], sample, char_data[sample]);
     }
   }
   if (test_result) {