add synthesis flow

IObundle · Oct 29, 2023 · 21facb1 · 21facb1
1 parent 15268f8
commit 21facb1
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Showing 2 changed files with 3 additions and 1 deletion.
diff --git a/Makefile b/Makefile
@@ -45,6 +45,8 @@ fpga-test:
 	make clean setup fpga-run BOARD=AES-KU040-DB-G INIT_MEM=1 USE_EXTMEM=0 
 	make clean setup fpga-run BOARD=AES-KU040-DB-G INIT_MEM=0 USE_EXTMEM=1 
 
+syn-build: clean
+	nix-shell --run "make setup && make -C ../$(CORE)_V*/ syn-build"
 
 doc-build:
 	nix-shell --run 'make clean setup && make -C ../$(CORE)_V*/ doc-build'

diff --git a/iob_soc.py b/iob_soc.py
@@ -39,7 +39,7 @@
 class iob_soc(iob_module):
     name = "iob_soc"
     version = "V0.70"
-    flows = "pc-emul emb sim doc fpga"
+    flows = "pc-emul emb sim doc fpga syn"
     setup_dir = os.path.dirname(__file__)
 
     # IOb-SoC has the following list of non standard attributes: