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On 2021-05-09 03:08, Kirtai wrote:
Just a quick note to mention that Risc5 is a CPU developed by Niklaus
Wirth for Project Oberon. It's not the same as the Risc-V CPU
architecture.
Not that it's likely to confuse people other than unusual hardware
nerds like myself but it would be nice to use Risc-V in all places. :)
I find "5" shorter to spell and less confusing than "-V".
Also, no Mayan numerals on my keyboard! ;^)
Note that the PowerLang and RISCy code is waaaaaayyy pre-alpha!
Just getting the bits together. Check back next year sometime..
Cheers,
-KenD
No worries, I just thought I'd mention it since it did confuse me on first sight. But then again, I am one of those people who are fascinated by unusual and obscure hardware. :)
Just a quick note to mention that Risc5 is a CPU developed by Niklaus Wirth for Project Oberon. It's not the same as the Risc-V CPU architecture.
Not that it's likely to confuse people other than unusual hardware nerds like myself but it would be nice to use Risc-V in all places. :)
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