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Fix missing tracing around load/store and move opt passes #40

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Fix missing tracing around load/store and move opt passes #40

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2 changes: 2 additions & 0 deletions llvm/lib/Target/Mips/Mips.h
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Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,8 @@ namespace llvm {
void initializeNMOptimizeJumpTablesPass (PassRegistry&);
void initializeNanoMipsRegisterReAllocPass(PassRegistry &);
void initializeRedundantCopyEliminationPass(PassRegistry&);
void initializeNMLoadStoreOptPass(PassRegistry&);
void initializeNMMoveOptPass(PassRegistry&);
} // end namespace llvm;

#endif
2 changes: 2 additions & 0 deletions llvm/lib/Target/Mips/MipsTargetMachine.cpp
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Expand Up @@ -62,6 +62,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() {
initializeMipsPreLegalizerCombinerPass(*PR);
initializeNMOptimizeJumpTablesPass(*PR);
initializeRedundantCopyEliminationPass(*PR);
initializeNMLoadStoreOptPass(*PR);
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How did we previously register the pass with pass manager? Do you need to remove that?

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It was not explicitly registered, which was the problem. It was just created and added in the MipsPassConfig::addPreSched2() -- so it was run, but otherwise the pass manager didn't know about it.

initializeNMMoveOptPass(*PR);
}

static std::string computeDataLayout(const Triple &TT, StringRef CPU,
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7 changes: 5 additions & 2 deletions llvm/lib/Target/Mips/NanoMipsLoadStoreOptimizer.cpp
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Expand Up @@ -20,7 +20,8 @@

using namespace llvm;

#define NM_LOAD_STORE_OPT_NAME "nanoMIPS load/store optimization pass"
#define PASS_NAME "nanoMIPS load/store optimization pass"
#define DEBUG_TYPE "nmloadstoreopt"

static cl::opt<bool>
DisableNMSaveRestore("disable-nm-save-restore", cl::Hidden, cl::init(false),
Expand Down Expand Up @@ -60,7 +61,7 @@ struct NMLoadStoreOpt : public MachineFunctionPass {
MCRegisterClass RC = MipsMCRegisterClasses[Mips::GPR32NMRegClassID];

NMLoadStoreOpt() : MachineFunctionPass(ID) {}
StringRef getPassName() const override { return NM_LOAD_STORE_OPT_NAME; }
StringRef getPassName() const override { return PASS_NAME; }
bool runOnMachineFunction(MachineFunction &Fn) override;
bool isReturn(MachineInstr &MI);
bool isStackPointerAdjustment(MachineInstr &MI, bool IsRestore);
Expand Down Expand Up @@ -752,6 +753,8 @@ bool NMLoadStoreOpt::generatePCRelative(MachineBasicBlock &MBB) {
return Candidates.size() > 0;
}

INITIALIZE_PASS(NMLoadStoreOpt, DEBUG_TYPE, PASS_NAME, false, false)

namespace llvm {
FunctionPass *createNanoMipsLoadStoreOptimizerPass() {
return new NMLoadStoreOpt();
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7 changes: 5 additions & 2 deletions llvm/lib/Target/Mips/NanoMipsMoveOptimizer.cpp
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Expand Up @@ -24,7 +24,8 @@

using namespace llvm;

#define NM_MOVE_OPT_NAME "nanoMIPS move optimization pass"
#define DEBUG_TYPE "nmmoveopt"
#define PASS_NAME "nanoMIPS move optimization pass"

static cl::opt<bool>
DisableNMMoveOpt("disable-nm-move-opt", cl::Hidden, cl::init(false),
Expand Down Expand Up @@ -56,7 +57,7 @@ struct NMMoveOpt : public MachineFunctionPass {
const MipsSubtarget *STI;
const TargetInstrInfo *TII;
NMMoveOpt() : MachineFunctionPass(ID) {}
StringRef getPassName() const override { return NM_MOVE_OPT_NAME; }
StringRef getPassName() const override { return PASS_NAME; }
bool runOnMachineFunction(MachineFunction &) override;
bool generateMoveP(MachineBasicBlock &);
bool generateMoveBalc(MachineBasicBlock &);
Expand Down Expand Up @@ -353,6 +354,8 @@ bool NMMoveOpt::generateMoveBalc(MachineBasicBlock &MBB) {
return MoveBalcPairs.size() > 0;
}

INITIALIZE_PASS(NMMoveOpt, DEBUG_TYPE, PASS_NAME, false, false)

namespace llvm {
FunctionPass *createNanoMipsMoveOptimizerPass() { return new NMMoveOpt(); }
} // namespace llvm
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