Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[nanoMIPS][LLD] nanoMIPS target added to lld #51

Open
wants to merge 6 commits into
base: nanomips-llvm16
Choose a base branch
from

Commits on Oct 11, 2024

  1. [nanoMIPS][LLD] nanoMIPS target added to lld

    Features added:
    - nanoMIPS relocation resolving
    - nanoMIPS eflags calculation
    - .nanoMIPS.abiflags section creation
    - nanoMIPS _gp symbol setup
    - special .eh_frame handling in maybeReportUndefined
    - R_NANOMIPS_PCHI20 renamed to R_NANOMIPS_PC_HI20
    AndrijaSyrmia committed Oct 11, 2024
    Configuration menu
    Copy the full SHA
    f49ad16 View commit details
    Browse the repository at this point in the history

Commits on Oct 30, 2024

  1. [nanoMIPS][LLD] Added linker transformations

    Added nanoMIPS specific linker relaxations/expansions:
    - Transformations are conducted through a driver class
      NanoMipsTransformController. It scans through relocs of executable
      input sections and performs relaxations/expansions if possible or
      necessary
    - New nanoMIPS specific options used in transformations added to lld
    - New TableGen backend (NanoMipsTransformationPropertyEmitter.cpp) for
      emitting properties of instructions and relocations, transformation
      templates used in linker transformations
    AndrijaSyrmia committed Oct 30, 2024
    Configuration menu
    Copy the full SHA
    66897b8 View commit details
    Browse the repository at this point in the history
  2. [nanoMIPS][LLD] Change in linker script parsing

    Changed parsing of the linker script, as some nanoMIPS linker scripts
    require different set of rules for parsing:
    - Dot operator can be used as section address expression, and its
      value should be determined by the latest value of dot, not the
      current position in the memory region
    - Alignment for output section is not ignored for nanoMIPS if output
      section has got address expression
    - SHT_NOBITS sections don't occupy load addresses
    - OVERLAY sections can have a load region and memory region and
      assignment or byte commands in them.
    AndrijaSyrmia committed Oct 30, 2024
    Configuration menu
    Copy the full SHA
    19015e3 View commit details
    Browse the repository at this point in the history
  3. [nanoMIPS][LLD] .eh_frame section parsing changed

    Changed the way .eh_frame parsing is done for nanoMIPS, as they may
    contain relocations referring to the size of the CIEs/FDEs. lld reads
    .eh_frame sections using these sizes so it is necessary that the size
    value is available at the time of .eh_frame section parsing.
    
    It seems like integrated assembler for nanoMIPS is not resolving this
    relocation at assembly time, but the gnu's assembler for nanoMIPS is
    resolving it.
    AndrijaSyrmia committed Oct 30, 2024
    Configuration menu
    Copy the full SHA
    0838cd5 View commit details
    Browse the repository at this point in the history
  4. [ELF][RISCV] Implement --emit-relocs with relaxation

    Linker relaxation may change relocations (offsets and types). However,
    when --emit-relocs is used, relocations are simply copied from the input
    section causing a mismatch with the corresponding (relaxed) code
    section.
    
    This patch fixes this as follows: for non-relocatable RISC-V binaries,
    `InputSection::copyRelocations` reads relocations from the relocated
    section's `relocations` array (since this gets updated by the relaxation
    code). For all other cases, relocations are read from the input section
    directly as before.
    
    In order to reuse as much code as possible, and to keep the diff small,
    the original `InputSection::copyRelocations` is changed to accept the
    relocations as a range of `Relocation` objects. This means that, in the
    general case when reading from the input section, raw relocations need
    to be converted to `Relocation`s first, which introduces quite a bit of
    boiler plate. It also means there's a slight code size increase due to
    the extra instantiations of `copyRelocations` (for both range types).
    
    Reviewed By: MaskRay
    
    Differential Revision: https://reviews.llvm.org/D159082
    mtvec authored and AndrijaSyrmia committed Oct 30, 2024
    Configuration menu
    Copy the full SHA
    6cabcac View commit details
    Browse the repository at this point in the history
  5. [nanoMIPS][LLD] emit relocs with transformations

    Similar to RISC-V relaxations, nanoMIPS transformations change
    relocations and they need to be updated before writing them down to
    output. One difference is that nanoMIPS can add new relocations, not
    just change them like RISC-V, so during linker transformations size of
    reloc sections need to be updated if --emit-relocs option is on.
    AndrijaSyrmia committed Oct 30, 2024
    Configuration menu
    Copy the full SHA
    4099547 View commit details
    Browse the repository at this point in the history