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test: fix vfcvt golden
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wissygh committed Sep 23, 2023
1 parent b48b806 commit 43336e2
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Showing 7 changed files with 40 additions and 40 deletions.
3 changes: 1 addition & 2 deletions src/main/scala/yunsuan/vector/VectorConvert/CVT16.scala
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,7 @@ package yunsuan.vector.VectorConvert

import chisel3._
import chisel3.util._
import yunsuan.util.LookupTree
import yunsuan.vector.VectorConvert.util.{CLZ, ShiftRightJam, VFRSqrtTable, VFRecTable, RoundingUnit}
import yunsuan.vector.VectorConvert.util._
import yunsuan.vector.VectorConvert.RoundingModle._


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2 changes: 1 addition & 1 deletion src/main/scala/yunsuan/vector/VectorConvert/CVT32.scala
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ package yunsuan.vector.VectorConvert
import chisel3._
import chisel3.util._
import yunsuan.util.LookupTree
import yunsuan.vector.VectorConvert.util.{CLZ, ShiftRightJam, VFRSqrtTable, VFRecTable, RoundingUnit}
import yunsuan.vector.VectorConvert.util._
import yunsuan.vector.VectorConvert.RoundingModle._


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2 changes: 1 addition & 1 deletion src/main/scala/yunsuan/vector/VectorConvert/CVT64.scala
Original file line number Diff line number Diff line change
Expand Up @@ -543,7 +543,7 @@ class CVT64(width: Int = 64) extends CVT(width){
val resultRounded = fracRounded
val isZeroRounded = !resultRounded.orR

val normalResult = Mux(signSrc && resultRounded.orR, (~resultRounded).asUInt + 1.U, resultRounded) //排除0 补码
val normalResult = Mux(signSrc && resultRounded.orR, (~resultRounded).asUInt + 1.U, resultRounded) //exclude 0

// i=log2(intType)
val ofExpRounded = !exp.head(1) && Mux1H(int1HOut,
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1 change: 0 additions & 1 deletion src/test/csrc/golden_model/gm_common.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -74,7 +74,6 @@ VecOutput VPUGoldenModel::get_expected_output(VecInput input) {
}
}
else{
ElementOutput output_part[number];
for(int i = 0; i < number; i++) {
ElementInput element = select_element(input, i);
switch (sew) {
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2 changes: 0 additions & 2 deletions src/test/csrc/include/test_driver.h
Original file line number Diff line number Diff line change
Expand Up @@ -34,8 +34,6 @@ class TestDriver {
VecOutput dut_output;
TestType test_type;
bool issued;
VecOutput expect_output_buffer[3];
VecInput input_buffer[3];

VGMFloatAdder vfa;
VGMFloatFMA vff;
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10 changes: 7 additions & 3 deletions src/test/csrc/include/vpu_constant.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ extern "C"{
#define VLEN 128
#define XLEN 64

#define FU_NUM 8 // for random
// #define FU_NUM 8 // for random
#define VFloatAdder (0)
#define VFloatFMA (1)
#define VFloatDivider (2)
Expand All @@ -22,7 +22,11 @@ extern "C"{
#define VIntegerALUV2 (5)
#define VIntegerDivider (6)
#define VFloatCvt (7)
#define ALL_FUTYPES {VFloatAdder,VFloatFMA,VFloatDivider,VIntegerALU,VPermutation,VIntegerALUV2,VIntegerDivider,VFloatCvt}
// #define ALL_FUTYPES {VFloatAdder,VFloatFMA,VFloatDivider,VIntegerALU,VPermutation,VIntegerALUV2,VIntegerDivider,VFloatCvt}

//will be delated
#define FU_NUM 6
#define ALL_FUTYPES {VFloatFMA,VFloatDivider,VIntegerALU,VPermutation,VIntegerDivider,VFloatCvt}

#define INT_ROUNDING(result, xrm, gb) \
do { \
Expand Down Expand Up @@ -288,7 +292,7 @@ extern "C"{

#define VFCVT_ALL_OPTYPES {VFCVT_XUFV, VFCVT_XFV, VFCVT_FXUV, VFCVT_FXV, VFCVT_RTZ_XUFV, VFCVT_RTZ_XFV, \
VFWCVT_XUFV, VFWCVT_XFV, VFWCVT_FXUV, VFWCVT_FXV, VFWCVT_FFV, VFWCVT_RTZ_XUFV, VFWCVT_RTZ_XFV, \
VFNCVT_XUFW, VFNCVT_XFW, VFNCVT_FXUW, VFNCVT_FXW, VFNCVT_FFW, VFNCVT_ROD_FFW, VFNCVT_RTZ_XUFW ,VFNCVT_RTZ_XFW, VFRSQRT7, VFREC7}\
VFNCVT_XUFW, VFNCVT_XFW, VFNCVT_FXUW, VFNCVT_FXW, VFNCVT_FFW, VFNCVT_ROD_FFW, VFNCVT_RTZ_XUFW ,VFNCVT_RTZ_XFW, VFRSQRT7, VFREC7}

#define VFCVT_8_NUM 6
#define VFCVT_8_OPTYPES {VFWCVT_FXUV, VFWCVT_FXV, VFNCVT_XUFW, VFNCVT_XFW, VFNCVT_RTZ_XUFW, VFNCVT_RTZ_XFW}
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60 changes: 30 additions & 30 deletions src/test/csrc/test_driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ extern "C" {
#include "include/test_driver.h"

TestDriver::TestDriver():
issued(false), verbose(VERBOSE), keepinput(false)
issued(false), verbose(false), keepinput(false)
{
// aviod random value
set_test_type();
Expand All @@ -30,7 +30,7 @@ void TestDriver::set_test_type() {
test_type.pick_fuType = false;
test_type.pick_fuOpType = false;
test_type.fuType = VFloatCvt;
test_type.fuOpType = pickFuOptype;
test_type.fuOpType = VFREC7;
printf("Set Test Type Res: fuType:%d fuOpType:%d\n", test_type.fuType, test_type.fuOpType);
}

Expand Down Expand Up @@ -118,8 +118,8 @@ uint8_t TestDriver::gen_random_sew() {
{
case VIntegerALU: return rand()%4; break;
case VPermutation: return rand()%4; break;
// default: return (rand()%3)+1; break;
default: return rand()%4; break;
case VFloatCvt: return rand()%4; break;
default: return (rand()%3)+1; break;
}
}

Expand Down Expand Up @@ -355,43 +355,43 @@ void TestDriver::get_random_input() {
input.src4[0] = rand64();
input.src4[1] = rand64();

if(pickSEW) input.sew = pickSEWvalue;
else input.sew =gen_random_sew();

if (!test_type.pick_fuType) { input.fuType = gen_random_futype(ALL_FUTYPES); }
else { input.fuType = test_type.fuType; }
if (!test_type.pick_fuOpType) { input.fuOpType = gen_random_optype(); }
else { input.fuOpType = test_type.fuOpType; }
// input.sew = gen_random_sew();
// input.widen = gen_random_widen();
// input.src_widen = gen_random_src_widen();
// input.is_frs1 = gen_random_is_frs1();
// input.is_frs2 = gen_random_is_frs2();

if(input.fuType == VFloatCvt){
input.sew = gen_random_sew();
input.is_frs1 = false;
input.is_frs2 = false;
input.widen = false;
if (!test_type.pick_fuOpType) { input.fuOpType = gen_random_optype(); }
else { input.fuOpType = test_type.fuOpType; }
}else{
if (!test_type.pick_fuOpType) { input.fuOpType = gen_random_optype(); }
else { input.fuOpType = test_type.fuOpType; }
input.sew = gen_random_sew();
input.widen = gen_random_widen();
input.src_widen = gen_random_src_widen();
input.is_frs1 = gen_random_is_frs1();
input.is_frs2 = gen_random_is_frs2();
gen_random_vecinfo();
gen_random_uopidx();
gen_input_vperm();
}

if(input.fuType == VFloatCvt && input.fuOpType == VFNCVT_ROD_FFW){
input.rm = 6;
}else if(input.fuType == VFloatCvt && input.fuOpType == VFCVT_RTZ_XUFV ||
input.fuType == VFloatCvt && input.fuOpType == VFCVT_RTZ_XFV ||
input.fuType == VFloatCvt && input.fuOpType == VFWCVT_RTZ_XUFV ||
input.fuType == VFloatCvt && input.fuOpType == VFWCVT_RTZ_XFV ||
input.fuType == VFloatCvt && input.fuOpType == VFNCVT_RTZ_XUFW ||
input.fuType == VFloatCvt && input.fuOpType == VFNCVT_RTZ_XFW
}else if((input.fuType == VFloatCvt && input.fuOpType == VFCVT_RTZ_XUFV) ||
(input.fuType == VFloatCvt && input.fuOpType == VFCVT_RTZ_XFV) ||
(input.fuType == VFloatCvt && input.fuOpType == VFWCVT_RTZ_XUFV) ||
(input.fuType == VFloatCvt && input.fuOpType == VFWCVT_RTZ_XFV) ||
(input.fuType == VFloatCvt && input.fuOpType == VFNCVT_RTZ_XUFW) ||
(input.fuType == VFloatCvt && input.fuOpType == VFNCVT_RTZ_XFW)
){
input.rm = 1;
}else{
input.rm = rand() % 5;
}

input.rm_s = rand() % 5;
gen_random_vecinfo();
gen_random_uopidx();
gen_input_vperm();

input.is_frs1 = FRS1;
input.is_frs2 = FRS2;
input.widen = 0;
input.src_widen =0;

if (input.fuType == VIntegerDivider) {
gen_random_idiv_input();
}
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