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reformat
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wissygh authored and xiaofeibao-xjtu committed Sep 25, 2023
1 parent 7837e0e commit 4b82884
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Showing 2 changed files with 2 additions and 2 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -72,4 +72,4 @@ object RoundingUnit {
// (io.in.sig.head(2) === "b01".U(2.W) && !rounder.io.cout)
//
// io.tininess := tininess
//}
//}
2 changes: 1 addition & 1 deletion src/test/scala/top/VectorSimTop.scala
Original file line number Diff line number Diff line change
Expand Up @@ -244,7 +244,7 @@ class SimTop() extends VPUTestModule {
vff_result.fflags(i) := vff.io.fflags
vff_result.vxsat := 0.U // DontCare

// connect vcvts io
// connect vcvt's io
vcvt.io.sew := sew
vcvt.io.opType := opcode
vcvt.io.rm := rm
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