Add CC2755R10 and CC2745R10-Q10, change files structure

TexasInstruments · Dec 25, 2024 · 033cc1d · 033cc1d
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diff --git a/.DS_Store b/.DS_Store
diff --git a/...59_eng/ble5_basic_ble_oad_offchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin b/...59_eng/ble5_basic_ble_oad_offchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin
diff --git a/..._59_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin b/..._59_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin
diff --git a/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin b/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin
diff --git a/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin b/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin
diff --git a/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin b/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin
diff --git a/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin b/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v2.bin
diff --git a/...8_30_00_51_eng/ble5_basic_persistent_cc1354p10_1_ticlang_FlashOnly_Release_persistent.bin b/...8_30_00_51_eng/ble5_basic_persistent_cc1354p10_1_ticlang_FlashOnly_Release_persistent.bin
diff --git a/CC1354P10-1/8_30_00_51_eng/mcuboot_offchip_LP_EM_CC1354P10_1_nortos_ticlang.hex b/CC1354P10-1/8_30_00_51_eng/mcuboot_offchip_LP_EM_CC1354P10_1_nortos_ticlang.hex
diff --git a/CC1354P10-1/8_30_00_51_eng/mcuboot_onchip_LP_EM_CC1354P10_1_nortos_ticlang.hex b/CC1354P10-1/8_30_00_51_eng/mcuboot_onchip_LP_EM_CC1354P10_1_nortos_ticlang.hex
diff --git a/CC1354P10-1/README.txt b/CC1354P10-1/README.txt
@@ -0,0 +1,17 @@
+Flash images for chosen board to the following memory adresses.
+Board's bootloaders were specified in brackets.
+
+Tool: Uniflash (https://www.ti.com/tool/UNIFLASH) version min. 8.8.0.4946.
+
+Before flashing, ensure that chip on the board was erased.
+
+CC1354P10-1 (MCUBoot):
+	Onchip OAD:
+		AUTO(0x00)    -> mcuboot_onchip_LP_EM_CC1354P10_1_nortos_ticlang.hex
+		0x6000        -> ble5_basic_persistent_cc1354p10_1_ticlang_FlashOnly_Release_persistent.bin
+		0x30000       -> ble5_basic_ble_oad_onchip_peripheral_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin
+	Offchip OAD:
+		AUTO(0x00)    -> mcuboot_offchip_LP_EM_CC1354P10_1_nortos_ticlang.hex
+		0x6000        -> ble5_basic_ble_oad_offchip_peripheral_public_address_cc1354p10_1_ticlang_FlashOnly_Release_v1.bin
+
+After the board has been flashed, reboot it to start running images.
diff --git a/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin b/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin
diff --git a/...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin b/...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin
diff --git a/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin b/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin
diff --git a/...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin b/...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v2.0.0.bin
diff --git a/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin b/...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin → ...M_CC1354P10_6_freertos_ticlang-v1.0.0.bin
diff --git a/...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex → ...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex b/...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex → ...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex
diff --git a/...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex → ...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex b/...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex → ...chip_LP_EM_CC1354P10_6_nortos_ticlang.hex
diff --git a/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch b/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch
diff --git a/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin b/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin
diff --git a/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_6_ticlang_FlashOnly_Release_v2.bin b/...ic_ble_oad_offchip_peripheral_public_address_cc1354p10_6_ticlang_FlashOnly_Release_v2.bin
diff --git a/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin b/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin
diff --git a/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_6_ticlang_FlashOnly_Release_v2.bin b/..._51_eng/ble5_basic_ble_oad_onchip_peripheral_cc1354p10_6_ticlang_FlashOnly_Release_v2.bin
diff --git a/...8_30_00_51_eng/ble5_basic_persistent_cc1354p10_6_ticlang_FlashOnly_Release_persistent.bin b/...8_30_00_51_eng/ble5_basic_persistent_cc1354p10_6_ticlang_FlashOnly_Release_persistent.bin
diff --git a/CC1354P10-6/8_30_00_51_eng/mcuboot_offchip_LP_EM_CC1354P10_6_nortos_ticlang.hex b/CC1354P10-6/8_30_00_51_eng/mcuboot_offchip_LP_EM_CC1354P10_6_nortos_ticlang.hex
diff --git a/CC1354P10-6/8_30_00_51_eng/mcuboot_onchip_LP_EM_CC1354P10_6_nortos_ticlang.hex b/CC1354P10-6/8_30_00_51_eng/mcuboot_onchip_LP_EM_CC1354P10_6_nortos_ticlang.hex
diff --git a/CC1354P10-6/README.txt b/CC1354P10-6/README.txt
@@ -1,17 +1,17 @@
 Flash images for chosen board to the following memory adresses.
 Board's bootloaders were specified in brackets.
 
-Tool: Uniflash (https://www.ti.com/tool/UNIFLASH) version min. 8.3.0.4307.
+Tool: Uniflash (https://www.ti.com/tool/UNIFLASH) version min. 8.8.0.4946.
 
 Before flashing, ensure that chip on the board was erased.
 
 CC1354P10-6 (MCUBoot):
 	Onchip OAD:
 		AUTO(0x00)    -> mcuboot_onchip_LP_EM_CC1354P10_6_nortos_ticlang.hex
-		0x6000        -> basic_persistent_LP_EM_CC1354P10_6_freertos_ticlang-v1.0.0.bin
-		0x30000       -> basic_ble_oad_onchip_LP_EM_CC1354P10_6_freertos_ticlang-v1.0.0.bin
+		0x6000        -> ble5_basic_persistent_cc1354p10_6_ticlang_FlashOnly_Release_persistent.bin
+		0x30000       -> ble5_basic_ble_oad_onchip_peripheral_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin
 	Offchip OAD:
 		AUTO(0x00)    -> mcuboot_offchip_LP_EM_CC1354P10_6_nortos_ticlang.hex
-		0x6000        -> basic_ble_oad_offchip_LP_EM_CC1354P10_6_freertos_ticlang-v1.0.0.bin
+		0x6000        -> ble5_basic_ble_oad_offchip_peripheral_public_address_cc1354p10_6_ticlang_FlashOnly_Release_v1.bin
 
 After the board has been flashed, reboot it to start running images.
diff --git a/...im_offchip_LP_CC2651P3_nortos_ticlang.hex → ...im_offchip_LP_CC2651P3_nortos_ticlang.hex b/...im_offchip_LP_CC2651P3_nortos_ticlang.hex → ...im_offchip_LP_CC2651P3_nortos_ticlang.hex
diff --git a/...P_CC2651P3_tirtos7_ticlang_oad-v1.0.0.bin → ...P_CC2651P3_tirtos7_ticlang_oad-v1.0.0.bin b/...P_CC2651P3_tirtos7_ticlang_oad-v1.0.0.bin → ...P_CC2651P3_tirtos7_ticlang_oad-v1.0.0.bin
diff --git a/...P_CC2651P3_tirtos7_ticlang_oad-v2.0.0.bin → ...P_CC2651P3_tirtos7_ticlang_oad-v2.0.0.bin b/...P_CC2651P3_tirtos7_ticlang_oad-v2.0.0.bin → ...P_CC2651P3_tirtos7_ticlang_oad-v2.0.0.bin
diff --git a/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch b/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch
diff --git a/...e5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad_v2.bin b/...e5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad_v2.bin
diff --git a/CC2651P3/8_30_00_51_eng/ble5_bim_offchip_cc26x1p3_iar_Release_bim.hex b/CC2651P3/8_30_00_51_eng/ble5_bim_offchip_cc26x1p3_iar_Release_bim.hex
diff --git a/.../ble5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad.bin b/.../ble5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad.bin
diff --git a/...e5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad_v2.bin b/...e5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad_v2.bin
diff --git a/CC2651P3/README.txt b/CC2651P3/README.txt
@@ -1,13 +1,13 @@
 Flash images for chosen board to the following memory adresses.
 Board's bootloaders were specified in brackets.
 
-Tool: Uniflash (https://www.ti.com/tool/UNIFLASH) version min. 8.3.0.4307.
+Tool: Uniflash (https://www.ti.com/tool/UNIFLASH) version min. 8.8.0.4946.
 
 Before flashing, ensure that chip on the board was erased.
 
 CC2651P3 (TI BIM):
 	Offchip OAD:
-		0x00          -> simple_peripheral_oad_offchip_LP_CC2651P3_tirtos7_ticlang_oad-v1.0.0.bin
-		AUTO(0x56000) -> bim_offchip_LP_CC2651P3_nortos_ticlang.hex
+		0x00          -> ble5_simple_peripheral_oad_offchip_public_address_cc26x1p3_iar_FlashOnly_Release_oad.bin
+		AUTO(0x56000) -> ble5_bim_offchip_cc26x1p3_iar_Release_bim.hex
 
 After the board has been flashed, reboot it to start running images.
diff --git a/...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex → ...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex b/...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex → ...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex
diff --git a/...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex → ...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex b/...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex → ...chip_CC26X2R1_LAUNCHXL_nortos_ticlang.hex
@@ -1,52 +1,52 @@
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diff --git a/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin b/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin
diff --git a/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin b/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin
diff --git a/...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin b/...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin
diff --git a/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin b/...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v1.0.0.bin
diff --git a/...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin b/...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin → ...1_LAUNCHXL_tirtos7_ticlang_oad-v2.0.0.bin
diff --git a/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch b/...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch → ...x_cc26xx_sdk_7_10_00_98-oadbinaries.patch
diff --git a/...le5_simple_peripheral_oad_offchip_public_address_cc26x2r1_iar_FlashROM_Release_oad_v2.bin b/...le5_simple_peripheral_oad_offchip_public_address_cc26x2r1_iar_FlashROM_Release_oad_v2.bin
diff --git a/...ble5_simple_peripheral_oad_onchip_public_address_cc26x2r1_iar_FlashROM_Release_oad_v2.bin b/...ble5_simple_peripheral_oad_onchip_public_address_cc26x2r1_iar_FlashROM_Release_oad_v2.bin