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riscv_debug: Fixed an issue in riscv_hart_discover_triggers which i…
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…s triggered on WCH devices

This re-implements the fix from fubbed PR #1576 with thanks to mean00

Co-Authored-By: mean <[email protected]>
Co-Authored-By: dragonmux <[email protected]>
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2 people authored and esden committed Nov 30, 2023
1 parent 89c055f commit 630461e
Showing 1 changed file with 6 additions and 1 deletion.
7 changes: 6 additions & 1 deletion src/target/riscv_debug.c
Original file line number Diff line number Diff line change
Expand Up @@ -676,7 +676,12 @@ static void riscv_hart_discover_triggers(riscv_hart_s *const hart)
riscv_csr_write(hart, RV_TRIG_SELECT | RV_CSR_FORCE_32_BIT, &trigger);
/* Try reading the trigger info */
uint32_t info = 0;
if (!riscv_csr_read(hart, RV_TRIG_INFO | RV_CSR_FORCE_32_BIT, &info)) {
/*
* If the read succeeds but info is still 0, assume we're talking to something like a WCH device
* which'll do this despite not actually implementing the tinfo register. Handle it the same as
* the read explicitly failing.
*/
if (!riscv_csr_read(hart, RV_TRIG_INFO | RV_CSR_FORCE_32_BIT, &info) || !info) {
/*
* If that fails, it's probably because the tinfo register isn't implemented, so read
* the tdata1 register instead and extract the type from the MSb and build the info bitset from that
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