needs cleanup, but this plays

commaai · Sep 3, 2024 · 3af1ea6 · 3af1ea6
1 parent cbfef1b
commit 3af1ea6
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Showing 3 changed files with 35 additions and 7 deletions.
diff --git a/board/boards/cuatro.h b/board/boards/cuatro.h
@@ -71,6 +71,10 @@ void cuatro_sound_enable(bool enabled) {
   set_gpio_output(GPIOA, 5, enabled);
 }
 
+void cuatro_set_siren_enabled(bool enabled) {
+  UNUSED(enabled);
+}
+
 void cuatro_init(void) {
   red_chiplet_init();
 
@@ -154,7 +158,7 @@ board board_cuatro = {
   .read_current_mA = cuatro_read_current_mA,
   .set_fan_enabled = cuatro_set_fan_enabled,
   .set_ir_power = tres_set_ir_power,
-  .set_siren = cuatro_sound_enable,
+  .set_siren = cuatro_set_siren_enabled,
   .set_bootkick = cuatro_set_bootkick,
   .read_som_gpio = tres_read_som_gpio
 };
diff --git a/board/drivers/sound.h b/board/drivers/sound.h
@@ -9,7 +9,7 @@ struct sound_buf_t {
 } sound_buf_t;
 
 __attribute__((section(".sram4"))) struct sound_buf_t rx_buf[2];
-__attribute__((section(".sram12"))) struct sound_buf_t tx_buf[2];
+__attribute__((section(".sram4"))) uint16_t buf[RX_BUF_SIZE];
 
 void BDMA_Channel0_IRQ_Handler(void) {
   BDMA->IFCR |= BDMA_IFCR_CGIF0; // clear flag
@@ -18,12 +18,21 @@ void BDMA_Channel0_IRQ_Handler(void) {
   // process samples (shift to 12b and bias to be unsigned)
   uint8_t buf_idx = ((BDMA_Channel0->CCR & BDMA_CCR_CT) >> BDMA_CCR_CT_Pos) == 1U ? 0U : 1U;
   for (uint16_t i=0U; i < RX_BUF_SIZE; i++) {
-    tx_buf[buf_idx].buf[i] = (rx_buf[buf_idx].buf[i] >> 4) + (1U << 11);
+    //buf[i] = (((int16_t *) rx_buf[buf_idx].buf)[i] >> 4) + 0x800;
+    // rx_buf[buf_idx].buf[i] = ((rx_buf[buf_idx].buf[i] & 0xFF) << 8) | ((rx_buf[buf_idx].buf[i] & 0xFF00) >> 8);
+
+    // buf[i] = (rx_buf[buf_idx].buf[i] >> 4) & 0xFFF;
+
+    int32_t biased = ((int32_t) ((int16_t *) rx_buf[buf_idx].buf)[i]) + (1U << 14);
+    biased &= 0xFFFF;
+
+    buf[i] = (((uint32_t) biased) >> 3);
   }
 
   rx_buf[buf_idx].processed = true;
+  DMA1->LIFCR |= 0xFFFFFFFF;
   register_clear_bits(&DMA1_Stream1->CR, DMA_SxCR_EN);
-  register_set(&DMA1_Stream1->M0AR, (uint32_t) tx_buf[buf_idx].buf, 0xFFFFFFFFU);
+  register_set(&DMA1_Stream1->M0AR, (uint32_t) buf, 0xFFFFFFFFU);
   DMA1_Stream1->NDTR = RX_BUF_SIZE;
   register_set_bits(&DMA1_Stream1->CR, DMA_SxCR_EN);
 }
@@ -74,9 +83,19 @@ void sound_init(void) {
   //DMA1_Stream1->CR |= DMA_SxCR_MINC | DMA_SxCR_CIRC | (1 << DMA_SxCR_DIR_Pos);
   // register_set_bits(&DMA1_Stream1->CR, DMA_SxCR_EN);
 
-  // Init trigger timer
+  // Setup DMA
+  // register_set(&DMA1_Stream1->M0AR, (uint32_t) sine, 0xFFFFFFFFU);
+  // register_set(&DMA1_Stream1->PAR, (uint32_t) &(DAC1->DHR8R1), 0xFFFFFFFFU);
+  // DMA1_Stream1->NDTR = sizeof(sine);
+  // register_set(&DMA1_Stream1->FCR, 0U, 0x00000083U);
+  // DMA1_Stream1->CR = (0b11UL << DMA_SxCR_PL_Pos);
+  // DMA1_Stream1->CR |= DMA_SxCR_MINC | DMA_SxCR_CIRC | (1U << DMA_SxCR_DIR_Pos);
+  // register_set_bits(&DMA1_Stream1->CR, DMA_SxCR_EN);
+
+  // Init trigger timer (48kHz)
   register_set(&TIM7->PSC, 0U, 0xFFFFU);
-  register_set(&TIM7->ARR, 200U, 0xFFFFU);
+  //register_set(&TIM7->ARR, 2494U, 0xFFFFU);
+  register_set(&TIM7->ARR, 1247U, 0xFFFFU);
   register_set(&TIM7->CR2, (0b10 << TIM_CR2_MMS_Pos), TIM_CR2_MMS_Msk);
   register_set(&TIM7->CR1, TIM_CR1_ARPE | TIM_CR1_URS, 0x088EU);
   TIM7->SR = 0U;

diff --git a/board/main.c b/board/main.c
@@ -174,7 +174,12 @@ void tick_handler(void) {
       if(rx_buf[0].buf[0] != 0U) {
         print("----\n");
         print("RX BUFS[0]: "); puth4(rx_buf[0].buf[0]); print(" "); puth4(rx_buf[1].buf[0]); print("\n");
-        print("TX BUFS[0]: "); puth4(tx_buf[0].buf[0]); print(" "); puth4(tx_buf[1].buf[0]); print("\n");
+        print("RX BUFS[1000]: "); puth4(rx_buf[0].buf[1000]); print(" "); puth4(rx_buf[1].buf[1000]); print("\n");
+        // print("TX BUFS[0]: "); puth4(tx_buf[0].buf[0]); print(" "); puth4(tx_buf[1].buf[0]); print("\n");
+        print("TIM7: "); puth4(TIM7->CNT); print("\n");
+        print("DMA1_S1->NDTR: "); puth(DMA1_Stream1->NDTR); print("\n");
+        print("DMA1_S1->CR: "); puth(DMA1_Stream1->CR); print("\n");
+        print("DMA1_S1->LISR: "); puth(DMA1->LISR); print("\n");
         print("----\n");
       }
     #endif