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Resevered System Verilog variable (clocking) used inside mgmt_core.v #68

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dineshannayya opened this issue Jul 5, 2021 · 0 comments

dineshannayya commented Jul 5, 2021

In File : verilog/rtl/mgmt_core.v

caravel_clocking clocking(

Instance definition "clocking" is reserved System verilog variable,

If we enable the SV swiitch (-g2005-sv) is iverilog tool is reporting this error.

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