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Issues list

Error of missing module and re-definition
#88 opened Jun 20, 2022 by AyaseErii
User project needs reset pin
#86 opened Dec 16, 2021 by RTimothyEdwards
Generating of DFFRAM macro fails during Power Delivery Network generation
#84 opened Nov 26, 2021 by boehmerst
Typo in the "about" section of the GitHub project page
#79 opened Sep 24, 2021 by JohnPhilipBiggs
Redirect https://caravel-docs.readthedocs.io/en/latest/ to the right place
#72 opened Aug 20, 2021 by mithro
Stuck at certain steps using caravel_user_project and caravel_user_project_analog.
#71 opened Aug 19, 2021 by peijunh
1
spi_* signals in Pin Description table not appearing in Pinout table
#70 opened Aug 5, 2021 by Piyush3dB
1
Resevered System Verilog variable (clocking) used inside mgmt_core.v
#68 opened Jul 5, 2021 by dineshannayya
IRQ input pin needs a glitch filter
#62 opened Jun 2, 2021 by RTimothyEdwards
PDK installation for several variants
#59 opened May 17, 2021 by thesourcerer8
Net types not explicitly declared, but default_nettyp set to none
#55 opened May 5, 2021 by heavySea
1
Emulated substrate ground shortening results in undefined behaviour in other simulators
#54 opened May 5, 2021 by heavySea
1
Multi-master Wishbone bus unsupported
#43 opened Feb 27, 2021 by jean-m-cyr
1
LVS/CVC issues with caravel modules
#41 opened Feb 23, 2021 by d-m-bailey
2
add a clock divider
#37 opened Jan 11, 2021 by mattvenn
Enable Pico Co-Processor Interface?
#35 opened Jan 4, 2021 by sjkelly
2
Documentation Improvement Notes documentation Improvements or additions to documentation enhancement New feature or request mpw-one lessons learned
#23 opened Dec 4, 2020 by mkkassem
ProTip! Find all open issues with in progress development work with linked:pr.