vexiiriscv git update

enjoy-digital · Sep 5, 2024 · f512c65 · f512c65
1 parent 1f2418d
commit f512c65
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/soc/cores/cpu/vexiiriscv/core.py b/litex/soc/cores/cpu/vexiiriscv/core.py
@@ -152,7 +152,7 @@ def args_read(args):
         vdir = get_data_mod("cpu", "vexiiriscv").data_location
         ndir = os.path.join(vdir, "ext", "VexiiRiscv")
 
-        NaxRiscv.git_setup("VexiiRiscv", ndir, "https://github.com/SpinalHDL/VexiiRiscv.git", "dev", "36dad634", args.update_repo)
+        NaxRiscv.git_setup("VexiiRiscv", ndir, "https://github.com/SpinalHDL/VexiiRiscv.git", "dev", "a15ea92c", args.update_repo)
 
         if not args.cpu_variant:
             args.cpu_variant = "standard"