feat: Enable CI in cross compiled environment

.github/workflows/github_actions.yml

@@ -5,6 +5,27 @@ on:
     branches: [main]
 
 jobs:
+  # run riscv tests
+  host_x86:
+    runs-on: ubuntu-20.04
+    steps:
+      - name: checkout code
+        uses: actions/[email protected]
+      - name: build artifact
+        run: |
+          sudo apt install device-tree-compiler
+          sudo mkdir build
+          cd build
+          ../configure --prefix=/opt/riscv
+          make
+
+          wget https://github.com/riscv-collab/riscv-gnu-toolchain/releases/download/2023.10.18/riscv64-elf-ubuntu-20.04-gcc-nightly-2023.10.18-nightly.tar.gz
+          sudo mkdir /opt/riscv
+          sudo tar -xzf riscv64-elf-ubuntu-20.04-gcc-nightly-2023.10.18-nightly.tar.gz -C /opt/
+          export PATH=$PATH:/opt/riscv/bin
+
+          sh scripts/cross-test.sh
+
   # for validate test cases
   host_arm:
     runs-on: ubuntu-20.04

neon2rvv.h

@@ -174,7 +174,7 @@ FORCE_INLINE uint32x4_t vaddq_u32(uint32x4_t __a, uint32x4_t __b) { return __ris
 FORCE_INLINE uint64x2_t vaddq_u64(uint64x2_t __a, uint64x2_t __b) { return __riscv_vadd_vv_u64m1(__a, __b, 2); }
 
 FORCE_INLINE int16x8_t vaddl_s8(int8x8_t __a, int8x8_t __b) {
-  return __riscv_vget_v_i16m2_i16m1(__riscv_vwadd_vv_i16m2(__a, __b, 8), 0);
+  return __riscv_vwadd_vv_i16m1(__a, __b, 8);
 }
 
 // FORCE_INLINE int32x4_t vaddl_s16(int16x4_t __a, int16x4_t __b);