Skip to content
View kkudrolli's full-sized avatar
  • Stanford University

Block or report kkudrolli

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. USB-Host USB-Host Public

    Contains the System Verilog description for a simplified USB host that implements the transaction, data-link, and physical layers of the bus.

    SystemVerilog 13 2

  2. Team-SDK-545 Team-SDK-545 Public

    An FPGA design project by Kais Kudrolli, Sohil Shah, and DongJoon Park for 18-545 at Carnegie Mellon University.

    VHDL 11 1

  3. Calculus-Calculator Calculus-Calculator Public

    A python implementation of a calculator that can graph integrals and derivatives as well as take the symbolic derivative of a function in terms of x.

    Python 8

  4. cs205l_final cs205l_final Public

    Final project for CS205L at Stanford University.

    Python 1

  5. munbattlesim munbattlesim Public

    Model UN battle simulator project: A way to simulate battles, troop movement, and resource movement in a MUN Joint Crisis Committee

    Python

  6. Testbench Testbench Public

    A System Verilog testbench used to find faults in a black box calculator design.

    SystemVerilog