misc: Cleanup crates

Some crates were not used with the same version depending on the module Signed-off-by: Esteban Blanc <[email protected]>
ks0n · Aug 3, 2023 · 8c79635 · 8c79635
1 parent 357c18f
commit 8c79635
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Showing 9 changed files with 8 additions and 16 deletions.
diff --git a/aarch64_qemuvirt/Cargo.toml b/aarch64_qemuvirt/Cargo.toml
@@ -7,8 +7,6 @@ edition = "2021"
 
 [dependencies]
 kernel = { path = "../kernel", features = ["aarch64_pgt48oa"] }
-cortex-a = "8.1"
-tock-registers = "0.7.0"
 log = "0.4"
 
 [features]

diff --git a/hal_aarch64/Cargo.toml b/hal_aarch64/Cargo.toml
@@ -7,5 +7,5 @@ edition = "2021"
 
 [dependencies]
 hal_core = { path = "../hal_core" }
-tock-registers = "0.7.x"
-cortex-a = "7.4.0"
+tock-registers = "0.8"
+cortex-a = "8.1"
diff --git a/hal_aarch64/src/cpu.rs b/hal_aarch64/src/cpu.rs
@@ -10,7 +10,7 @@ pub fn disable_fp_trapping() {
 pub fn set_physical_timer(delay: usize) {
     CNTP_TVAL_EL0.set(delay as u64);
 
-    unsafe { asm::barrier::isb(asm::barrier::SY) };
+    asm::barrier::isb(asm::barrier::SY);
 
     CNTP_CTL_EL0.write(
         CNTP_CTL_EL0::ENABLE::SET + CNTP_CTL_EL0::IMASK::CLEAR + CNTP_CTL_EL0::ISTATUS::CLEAR,

diff --git a/hal_aarch64/src/mm/mod.rs b/hal_aarch64/src/mm/mod.rs
@@ -67,13 +67,9 @@ unsafe fn load_pagetable(pt: &'static mut PageTable) {
         + TCR_EL1::EPD1::DisableTTBR1Walks,
     );
 
-    unsafe {
-        barrier::isb(barrier::SY);
-    }
+    barrier::isb(barrier::SY);
 
     SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
 
-    unsafe {
-        barrier::isb(barrier::SY);
-    }
+    barrier::isb(barrier::SY);
 }
diff --git a/hal_core/Cargo.toml b/hal_core/Cargo.toml
@@ -6,4 +6,4 @@ edition = "2021"
 # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
 
 [dependencies]
-bitflags = "1.3"
+bitflags = "2.3"
diff --git a/hal_core/src/mm.rs b/hal_core/src/mm.rs
@@ -38,6 +38,7 @@ impl PAddr {
 }
 
 bitflags::bitflags! {
+    #[derive(Clone, Copy)]
     pub struct Permissions: u8 {
         const READ    = 0b00000001;
         const WRITE   = 0b00000010;

diff --git a/hal_riscv64/Cargo.toml b/hal_riscv64/Cargo.toml
@@ -9,4 +9,4 @@ edition = "2021"
 hal_core = { path = "../hal_core" }
 modular-bitfield = "0.11"
 sbi = "0.2.0"
-riscv = "0.8.0"
+riscv = "0.10"
diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml
@@ -9,7 +9,6 @@ edition = "2021"
 [dependencies]
 cfg-if = "1.0"
 static_assertions = "1.1"
-once_cell = { version = "1.17", default-features = false }
 modular-bitfield = "0.11"
 bitflags = "2.1"
 fdt = "0.1"
@@ -26,7 +25,6 @@ tests = { path = "../tests", artifact = "bin" }
 
 [target.riscv64gc-unknown-none-elf.dependencies]
 sbi = "0.2"
-riscv = "0.10"
 hal_riscv64 = { path = "../hal_riscv64" }
 
 [target.aarch64-unknown-none.dependencies]

diff --git a/riscv64_qemuvirt/Cargo.toml b/riscv64_qemuvirt/Cargo.toml
@@ -7,7 +7,6 @@ edition = "2021"
 
 [dependencies]
 kernel = { path = "../kernel", features = ["riscv64_sv39"] }
-align-data = "0.1.0"
 log = "0.4"
 
 [features]