Fix up MCPlusBuilder.cpp to account for W0_HI on AArch64

Landing #114827 broke these tests, because they did not account for the new artificial registers.
llvm · Nov 14, 2024 · 576865a · 576865a
1 parent 8ff2da7
commit 576865a
Showing 1 changed file with 3 additions and 2 deletions.
diff --git a/bolt/unittests/Core/MCPlusBuilder.cpp b/bolt/unittests/Core/MCPlusBuilder.cpp
@@ -90,14 +90,15 @@ INSTANTIATE_TEST_SUITE_P(AArch64, MCPlusBuilderTester,
                          ::testing::Values(Triple::aarch64));
 
 TEST_P(MCPlusBuilderTester, AliasX0) {
-  uint64_t AliasesX0[] = {AArch64::W0, AArch64::X0, AArch64::W0_W1,
+  uint64_t AliasesX0[] = {AArch64::W0,    AArch64::W0_HI,
+                          AArch64::X0,    AArch64::W0_W1,
                           AArch64::X0_X1, AArch64::X0_X1_X2_X3_X4_X5_X6_X7};
   size_t AliasesX0Count = sizeof(AliasesX0) / sizeof(*AliasesX0);
   testRegAliases(Triple::aarch64, AArch64::X0, AliasesX0, AliasesX0Count);
 }
 
 TEST_P(MCPlusBuilderTester, AliasSmallerX0) {
-  uint64_t AliasesX0[] = {AArch64::W0, AArch64::X0};
+  uint64_t AliasesX0[] = {AArch64::W0, AArch64::W0_HI, AArch64::X0};
   size_t AliasesX0Count = sizeof(AliasesX0) / sizeof(*AliasesX0);
   testRegAliases(Triple::aarch64, AArch64::X0, AliasesX0, AliasesX0Count, true);
 }