lowRISC Debug Release
This is the lowRISC release v0.3, which mainly introduces the debug infrastructure. You can find a tutorial for the release here.
We use this release on Github to provide you prebuilt FPGA bitstreams and Linux. Please refer to the tutorial how to use them.
- boot.bin The boot image including bbl, vmlinux and init ramdisk.
- nexys4ddr_bram_boot.riscv The BRAM image to load boot.bin from SD to DDR.
- nexys4ddr_bram_jump.riscv The BRAM image to directly jump to DDR.
- nexys4ddr_fpga_debug.bit The FPGA bitstream with a trace debugger.
- nexys4ddr_fpga_standalone.bit The FPGA bitstream without a trace debugger.