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doc: flpr and building for nrf54l15
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Adds building article
Adds FLPR intro

Signed-off-by: Anna Wojdylo <[email protected]>
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138 changes: 138 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst
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.. _building_nrf54l:

Building and programming with nRF54L15 DK
#########################################

.. contents::
:local:
:depth: 2

This guide provides instructions on how to build and program the nRF54L15 development kit.
Whether you are working with single or multi-image builds, the following sections will guide you through the necessary steps.

Depending on the sample, you must program only the application core or both the Fast Lightweight Peripheral Processor (FLPR) and the application core.
Additionally, the process will differ based on whether you are working with a single-image or multi-image build.

.. note::
The following instructions do not include multi-image single-core builds.

This process complements the standard building procedure.
While building for the application core follows the default process, if you wish to utilize the FLPR core you must use additional configuration to enable it.

Building for the application core
*********************************

For instructions on building for the application core only, see how to :ref:`build an application <building>`.

Building for the application and FLPR core
******************************************

This section outlines how to build and program for both the application and FLPR core, covering separate builds and sysbuild configurations.
FLPR core supports two variants:

* ``nrf54l15dk/nrf54l15/cpuflpr`` where FLPR runs from SRAM, which is the recommended method.
To build FLPR image with this variant, the application core image must include the ``nordic-flpr`` snippet.

* ``nrf54l15dk/nrf54l15/cpuflpr/xip`` where FLPR runs from RRAM.
To build FLPR image with this variant, the application core image must include the ``nordic-flpr-xip`` snippet.

Standard build
--------------

This subsection focuses on how to build an application using sysbuild.

.. note::
Currently, the documentation does not cover specific instructions for building an application image that uses sysbuild to incorporate the FLPR core as a sub-image.
The only documented scenario is for building FLPR as the main image and the application as a sub-image.

Complete the following steps:

.. tabs::

.. group-tab:: Using VPR Launcher

VPR launcher allows to start the FLPR core.
When building for the ``nrf54l15dk/nrf54l15/cpuflpr`` target, the launcher loads the minimal sample to the application core by default.
The primary function of this image is to transfer the FLPR code to the designated region (if necessary) and initiate the FLPR core.

To build and flash both images, run the following command:

.. code-block:: console
west build -p -b nrf54l15dk/nrf54l15/cpuflpr
west flash
.. group-tab:: Using application that supports multi-image builds

If your application involves creating custom images for both the application core and the FLPR core, make sure to disable the VPR Launcher.
You can do this by disabling the ``SB_CONFIG_VPR_LAUNCHER`` option when building for the FLPR target.
For more details, see :ref:`how to configure Kconfig <configuring_kconfig>`.

To build and flash both images, run the following command:

.. code-block:: console
west build -p -b nrf54l15dk/nrf54l15/cpuflpr -- -DSB_CONFIG_VPR_LAUNCHER=n
west flash
Separate images
---------------

You can build and program application sample and the FLPR sample as separate images using the |nRFVSC| or command line.
To use nRF Util, see `Programming application firmware on the nRF54L15 SoC`_.
Depending on the selected method, complete the following steps:

.. tabs::

.. group-tab:: nRF Connect for VS Code

.. note::

The Visual Studio Code extension currently offers experimental support for the nRF54L15's FLPR core.
Certain features, particularly debugging, may not function as expected.

.. include:: /includes/vsc_build_and_run.txt

3. Build the application image by setting the following options:

* Board target to ``nrf54l15dk/nrf54l15/cpuapp``.
* Choose either ``nordic-flpr`` or ``nordic-flpr-xip`` snippet depending on the FLPR image target.
* System build to :guilabel:`No sysbuild`.

For more information, see :ref:`cmake_options`.

#. Build the FLPR image by setting the following options:

* Board target to ``nrf54l15dk/nrf54l15/cpuflpr`` (recommended) or ``nrf54l15dk/nrf54l15/cpuflpr/xip``.
* System build to :guilabel:`No sysbuild`.

For more information, see :ref:`cmake_options`.

.. group-tab:: Command line

1. |open_terminal_window_with_environment|
#. Build the application core image, and based on your build target include the appropriate snippet:

.. code-block:: console
west build -p -b nrf54l15dk/nrf54l15/cpuapp -S nordic-flpr --no-sysbuild
#. Flash the application core image by running the following command:

.. code-block:: console
west flash
#. Build the FLPR core image:

.. code-block:: console
west build -p -b nrf54l15dk/nrf54l15/cpuflpr --no-sysbuild
You can also customize the command for additional options, by adding :ref:`build parameters <optional_build_parameters>`.

#. Once you have successfully built the FLPR core image, flash it onto your device:

.. code-block:: console
west flash
2 changes: 2 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/index.rst
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zms
cryptography
testing_dfu
vpr_flpr
building_nrf54l
snippets
36 changes: 36 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst
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.. _vpr_flpr_nrf54l:

Working with the FLPR core
##########################

.. contents::
:local:
:depth: 2

The nRF54L15 SoC has a dedicated VPR CPU (RISC-V architecture), named *fast lightweight peripheral processor* (FLPR).
The following peripherals are available for use with the FLPR core, and can be accessed through the appropriate Zephyr Device Driver API:

* GPIO
* GPIOTE
* GRTC
* TWIM
* UARTE
* VPR

.. _vpr_flpr_nrf54l15_initiating:

Using FLPR with Zephyr multithreaded mode
*****************************************

FLPR can function as a generic core, operating under the full Zephyr kernel.
In this configuration, building the FLPR target is similar the application core.
However, the application core build must incorporate an overlay that enables the FLPR coprocessor.
This ensures that the necessary code to initiate FLPR is integrated.
See more information on :ref:`building_nrf54l`.

Memory allocation
*****************

If a FLPR CPU is running, it can lead to increased latency when accessing ``RAM_01``.
Because of this, when FLPR is used in a project, you should utilize ``RAM_01`` to store only the FLPR code, FLPR data, and the application CPU's non-time-sensitive information.
Conversely, you should use ``RAM_00`` to store data with strict access time requirements such as DMA buffers, and the application CPU data used in low-latency ISRs.
1 change: 1 addition & 0 deletions doc/nrf/links.txt
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.. _`nrfutil-trace`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-trace/CHANGELOG.html
.. _`nRF Sniffer for Bluetooth LE`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-ble-sniffer/guides/overview.html
.. _`Device command overview`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-device/guides/programming.html
.. _`Programming application firmware on the nRF54L15 SoC`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-device/guides/programming_nrf54L15.html

.. _`anomaly 19`: https://docs.nordicsemi.com/bundle/errata_nRF5340_EngA/page/ERR/nRF5340/EngineeringA/latest/anomaly_340_19.html

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