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doc: flpr and building for nrf54l15
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Adds building article
Adds FLPR intro

Signed-off-by: Anna Wojdylo <[email protected]>
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annwoj committed Sep 23, 2024
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108 changes: 108 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst
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.. _building_nrf54l:

Building and programming with nRF54L15 DK
#########################################

This guide provides instructions on how to build and program the nRF54L15 development kit.
Whether you are working with single or multi-image builds, the following sections will guide you through the necessary steps.

Depending on the sample, you must program only the application core or both the VPR and the application core.
Additionally, the process will differ based on whether you are working with a single-image or multi-image build.

Using the command line
======================

To build samples supporting the nRF54L15 DK from the command line, use :ref:`west <zephyr:west>`.
For programming you can choose either west, incorporating nrfjprog that from the `nRF Command Line Tools`_, or :ref:`nRF Util <toolchain_management_tools>`.

.. tabs::

.. group-tab:: Separate images

To build and program the application sample and the VPR sample as separate images, follow the instructions in :ref:`programming_cmd` for each of the samples.

See the following instructions for programming the images separately:

.. tabs::

.. group-tab:: west

1. |open_terminal_window_with_environment|
#. Run the following command to erase the flash memory of the VPR core and program the VPR sample:

.. code-block:: console
west flash --erase
#. Navigate to the build folder of the application sample and run the same command to erase the flash memory of the application core and program the application sample:

.. code-block:: console
west flash --erase
.. group-tab:: nRF Util

1. |open_terminal_window_with_environment|
#. Run the following command to erase the flash memory of the VPR core and program the VPR sample:

.. code-block:: console
nrfutil device program --firmware zephyr.hex --options chip_erase_mode=ERASE_ALL --core Network
.. note::
If you cannot locate the build folder of the VPR sample, look for a folder with one of these names inside the build folder of the application sample:

* :file:`rpc_host`
* :file:`hci_rpsmg`
* :file:`802154_rpmsg`
* :file:`multiprotocol_rpmsg`

#. Navigate to the build folder of the application sample and run the following command to erase the flash memory of the application core and program the application sample:

.. code-block:: console
nrfutil device program --firmware zephyr.hex --options chip_erase_mode=ERASE_ALL
.. note::
The application build folder will be in a sub-directory which is the name of the folder of the application

#. Reset the development kit:

.. code-block:: console
nrfutil device reset --reset-kind=RESET_PIN
See :ref:`readback_protection_error` if you encounter an error.

.. group-tab:: Sysbuild

To build and program a sysbuild HEX file, follow the instructions in :ref:`programming_cmd` for the application core sample.

To program the multi-image HEX file, you can use west or nRF Util.

.. tabs::

.. group-tab:: west

Enter the following command to program multi-image builds for different cores:

.. code-block:: console
west flash
.. note::
The minimum supported version of nrfjprog for multi-image builds for different cores is 10.21.0.

.. group-tab:: nRF Util

Enter the following commands to program multiple image builds for different cores:

.. Commands TBD
.. code-block:: console
nrfutil device program --firmware merged_CPUNET.hex --options verify=VERIFY_READ,chip_erase_mode=ERASE_CTRL_AP
nrfutil device program --firmware merged.hex --options verify=VERIFY_READ,chip_erase_mode=ERASE_CTRL_AP
.. note::
The ``--verify`` command confirms that the writing operation has succeeded.
2 changes: 2 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/index.rst
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features
testing_dfu
vpr_flpr
building_nrf54l
peripheral_sensor_node_shield
29 changes: 29 additions & 0 deletions doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst
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.. _vpr_flpr_nrf54l:

Working with the FLPR core
##########################

The nRF54L15 SoC has a dedicated RISC-V CPU (VPR), a fast lightweight peripheral processor (FLPR) designed for software-defined peripherals (SDP).
This core currently supports the following peripherals:

* GPIO
* GPIOTE
* GRTC
* TWIM
* UARTE
* VPR

Running the FLPR core
*********************

VPR is optimized for implementing SDP.
The software-defined peripheral running on VPR does not start on its own, but must be started by the application core processor.

.. To be outlined how
Memory allocation
*****************

If a SDP is active on a VPR CPU, it can lead to increased latency when accessing ``RAM_01``.
Because of this, when SDP is enabled in a project, you should use ``RAM_01`` to store only the VPR code, data, and other non-time-sensitive information.
Conversely, you should use ``RAM_00`` to store data with strict access time requirements such as DMA buffers, and data used in low-latency ISRs.

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